- Meta (Sunnyvale, CA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work ... state of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1....UVM methodology 10. 2+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM… more
- Meta (Sunnyvale, CA)
- …look at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work ... state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine... SOC environments 7. Develop and drive continuous Design Verification improvements using the latest … more
- Qualcomm (San Diego, CA)
- …develop solutions that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip ... a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you...**Qualifications:** Minimum Experience Level should be 2+ years in SOC -level or core-level verification with good understanding… more
- Meta (Sacramento, CA)
- …on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification plans, build ... design quality. 3. Develop and drive continuous Design Verification improvements using the latest ...Testbench 9. 3. IP/ SoC (System On Chip) Verification 10. 4. Debugging design 11. 5.… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our ... and the full chip. You will participate in the design verification and bring-up of the chip...Verification of Subsystems such as CPU, NPU, and SOC . - Drive Verification Methodology using System… more
- Arrow Electronics (Mountain View, CA)
- **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ... ASIC SoC and providing verification support from defining verification plan to...plan to multi-million gate product tapeout & for Test design and development * Develop complex self checking test… more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... join our diverse team today! As a Senior Digital Design Verification Engineer at NVIDIA,...least 12 years of validated experience. + Background in verification at Unit/Sub-system/ SOC level and expertise in… more
- Google (Goleta, CA)
- …field, or equivalent practical experience. + 5 years of experience with design verification . + Experience verifying digital systems using SystemVerilog/UVM. + ... Experience with SoC Verification including CPUs, bus interfaces, or...Questa Formal, or 360-DV. + Knowledge of digital architecture/logic design techniques and principles. As a Silicon Engineer… more
- Capgemini (Santa Clara, CA)
- …We're looking for a collaborative Senior Mixed-Signal Design Verification Engineer to help shape the future of SoC development. In this role, ... _Infrastructure_ **Organization:** _ERD PPL US_ **Title:** _Senior Mixed Signal Design Verification Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... to influence performance of the next generation GPU and SoC , allowing you to have real impact in a...silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and… more