• Sr. Physical Design Engineer

    Amazon (Cupertino, CA)
    …analysis and trade-offs - Experience with modern ASIC/FPGA design and verification tools - Experience with SOC bring-up and post-silicon validation Amazon ... of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new...distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design more
    Amazon (10/02/25)
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  • FPGA Digital Design Engineer 3/4

    Northrop Grumman (Los Angeles, CA)
    …making history. Northrop Grumman Advanced Weapons has an opening for a FPGA Digital Design Engineer with an active clearance, to join our team of qualified, ... with VHDL within the past 3 years . Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs . Experience with Electronic Design Automation (EDA) Tools: Vivado… more
    Northrop Grumman (09/27/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software solutions to ... debug world's leading SoC 's and GPU's. This position offers the opportunity to...teams at NVIDIA. + Work closely with software, architecture, design , verification , and silicon validation teams. +… more
    NVIDIA (09/10/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and...complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration 7. RTL… more
    Meta (08/01/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    … and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in test plan development and… more
    Meta (08/01/25)
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  • RTL Design Engineer , Hardware…

    Amazon (Sunnyvale, CA)
    …Fire TV and Amazon Echo. What will you help us create? The Role: As an RTL Design Engineer , you will be part of an advanced architecture team that is exploring ... for advanced functional blocks. You will participate in the design verification and bring-up of such blocks...in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,… more
    Amazon (07/30/25)
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  • Virtual Platform Hardware Modeling Engineer

    Meta (Sunnyvale, CA)
    …sensors, and new ways to map the human body.We are seeking a modeling Engineer to develop high-level models of complex SoC hardware. The virtual platforms ... the firmware development processes. **Required Skills:** Virtual Platform Hardware Modeling Engineer Responsibilities: 1. Design and develop SystemC TLM models… more
    Meta (08/13/25)
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  • ASIC Design Engineer - New College…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This position offers the opportunity to have real impact in a ... and RTL development (Verilog). + Good understanding of ASIC design flow including RTL design , verification , logic synthesis and timing analysis. +… more
    NVIDIA (10/03/25)
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  • Senior Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …to join our dynamic team today! We are actively looking for Physical design Engineers with RTL2GDS experience to implement complex high performance and low power ... SOC 's. What you'll be doing: + Responsible to Floor...and rolling in functional, Timing ECO's and netlist formal verification . + Physical verification - ERC, DRC, LVS… more
    NVIDIA (07/24/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    …synthesis, and timing analysis of several modules. + Integrate modules into the overall SOC design and work closely with other teams in the silicon bring-up ... Science and related (or equivalent experience) + 5+ years of SoC design /integration experience, including architecture and implementation of system-level… more
    NVIDIA (09/30/25)
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