• Lead E/E & Semiconductor Engineer

    Capgemini (Seattle, WA)
    **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Lead E/E & Semiconductor Engineer - SOC Design Verification Engineer_ **Location:** _WA-Seattle_… more
    Capgemini (07/15/25)
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  • Digital Design Engineer - Reality Lab…

    Meta (Redmond, WA)
    **Summary:** We are looking for an experienced digital design engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate ... and integrate advanced IP and AI accelerators into SOC /ASIC solutions to enable in-system testing and prototyping. The...next generation AI and AR solutions.As a Digital Design Engineer (DDE), you will be a key contributor in… more
    Meta (07/30/25)
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  • Senior Silicon Logic Design Engineer

    Microsoft Corporation (Redmond, WA)
    …optimize the Cloud infrastructure. We are looking for a **Senior Silicon Logic Design Engineer ** to join the team. **Responsibilities** In this role, you will be an ... micro-architecture implementation, RTL coding, IP and subsystem development, and SoC integration, along with design quality assurance. Your responsibilities include:… more
    Microsoft Corporation (08/27/25)
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  • ASIC Engineer , Design Verification

    Meta (Olympia, WA)
    Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification plans, build verification test benches to enable IP/sub-system/ SoC ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking...Design Verification to build IP and System On Chip ( SoC ) for data center applications. As a Design Verification… more
    Meta (08/29/25)
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  • FPGA/ASIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    FPGA/ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience...digital ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks +… more
    SpaceX (06/12/25)
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  • Sr. Detection/Splunk Engineer

    Datavant (Olympia, WA)
    …For** We are seeking a highly skilled and experienced **Senior Security Detection Engineer ** to join our Security Operations team. This role is critical to the ... controls, and adherence to compliance frameworks such as FedRAMP, SOC 2, and HIPAA. The ideal candidate will have...Support** + Support internal and external audit requests (FedRAMP, SOC 2, HIPAA, HITRUST, etc.). + Ensure appropriate audit… more
    Datavant (08/01/25)
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  • Digital Design Engineer

    Meta (Redmond, WA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
    Meta (08/11/25)
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  • Principal Data Science Security Engineer

    UKG (Ultimate Kronos Group) (Seattle, WA)
    …We're united by purpose, inspired by you. As a Principal Data Science Security Engineer , you will be part of UKG's Global Security Detection Engineering team. This ... collaborator between multiple stakeholder teams including the Security Operations Center ( SOC ), Threat Intelligence, Incident Response, and Incident Response + You… more
    UKG (Ultimate Kronos Group) (08/20/25)
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  • CyberSecurity AI Engineer

    Nelnet (Olympia, WA)
    …opportunities for people where they live, learn, and work. The Cybersecurity AI Engineer at Nelnet plays a critical role in securing the organization's AI/ML ... data poisoning, and model theft. * Collaborate with development, operations, and SOC teams to secure AI environments throughout the lifecycle. * Automate threat… more
    Nelnet (08/08/25)
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  • ASIC Engineer , Design Verification

    Meta (Olympia, WA)
    Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification plans, build verification test benches to enable IP/sub-system/ SoC ... 7. 1. System Verilog / UVM 8. 2. Constraint Random Testbench 9. 3. IP/ SoC (System On Chip) Verification 10. 4. Debugging design 11. 5. Functional Coverage 12.… more
    Meta (08/01/25)
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