• FPGA Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    …of FPGA development: RTL design, verification, synthesis, timing analysis, lab bring up/ validation + Experience developing firmware for Xilinx SoC FPGA platforms ... FPGA Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded...support. RESPONSIBILITIES: + Deliver highly reliable firmware for SpaceX-designed hardware + Work with engineers across the department to… more
    SpaceX (09/30/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    Microsoft Silicon, Cloud Hardware , and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering ... to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC)… more
    Microsoft Corporation (09/30/25)
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  • ASIC Design Engineer , Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine ... trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing - As a key member… more
    Amazon (09/19/25)
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  • Senior Board Product Development Engineer

    NVIDIA (Santa Clara, CA)
    …technology-and amazing people. We are now looking for Board Product Development Engineer to join our outstanding Automotive/Embedded Systems team! What you'll be ... teams. + Define product test requirements and drive NPI bring up, validation , and characterization for smooth production ramp at worldwide manufacturing sites as… more
    NVIDIA (08/08/25)
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  • Senior Design for Debug Architect and Methodology…

    NVIDIA (Santa Clara, CA)
    …Architect to implement hardware and software solutions to debug world's leading SoC 's and GPU's. This position offers the opportunity to have real impact in a ... for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD...Work closely with software, architecture, design, verification, and silicon validation teams. + Train and mentor junior engineers and… more
    NVIDIA (09/10/25)
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  • FPGA Design Engineer

    Actalent (Chatsworth, CA)
    Description Seeking a highly skilled FPGA Engineer with deep expertise in ARM processor integration to join our engineering team in Chatsworth, CA. This role is ... ideal for an experienced engineer passionate about designing and implementing high-performance, ruggedized embedded systems for aerospace, defense, and industrial… more
    Actalent (10/01/25)
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  • Sr. Physical Design Engineer , Annapurna…

    Amazon (Cupertino, CA)
    …- Experience with modern ASIC/FPGA design and verification tools - Experience with SOC bring-up and post-silicon validation Amazon is an equal opportunity ... Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom… more
    Amazon (10/02/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …product which is used by leading CPU/GPU/HyperScaler companies for pre-Silicon software validation of their SOC 's. You will develop new algorithms and ... impact on the world of technology. We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to d evelop and enhance the… more
    Cadence Design Systems, Inc. (09/30/25)
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  • System Design Engineer

    NVIDIA (Santa Clara, CA)
    …industrial PC, consumer electronics, etc . What You'll be Doing: + Build system hardware products around GPU & Tegra SoC . + Collaborate with cross-function team ... intelligence. We are now looking for a System Design Engineer in the Graphics Product Team. In this role,...efforts. + Create schematic, supervise PCB layout and system validation . + Handle documentation required to release the product… more
    NVIDIA (07/05/25)
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  • Senior System Integration Engineer

    NVIDIA (Santa Clara, CA)
    …+ Deep understanding of firmware/driver structures and their interaction with hardware . + Solid understanding of PVT dependencies and binning methodologies. + ... power gating, clock sequencing, binning, and power throttling. + Hands-on validation experience with lab debugging and tools (oscilloscopes, multimeters, logic… more
    NVIDIA (09/23/25)
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