• Sr. SOC /ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (09/11/25)
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  • Sr. SOC /ASIC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …memory BIST, and logic BIST, leveraging Siemens Tessent tools + Integration and verification of Design for Test (DFT) IPs and fabrics within Subsystems + Set ... Sr. SOC /ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply...and debug + Experience collaborating with cross-functional teams (eg, design , verification , and manufacturing) to ensure DFT… more
    SpaceX (09/09/25)
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  • Senior Design Verification Engineer,…

    Amazon (Sunnyvale, CA)
    …that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. ... and the full chip. You will participate in the design verification and bring-up of the chip...Verification of Subsystems such as CPU, NPU, and SOC . Drive Verification Methodology using System Verilog… more
    Amazon (09/04/25)
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  • Sr. Design Verification Manager,…

    Amazon (Cupertino, CA)
    …professional. Basic Qualifications - 8+ years of hands-on experience in ASIC/VLSI design verification , with a strong understanding of verification ... to ensure correctness and quality of our ML accelerator SOC - Develop and execute detailed verification ...or electrical engineering - Hands on experience with front-end logic design Amazon is an equal opportunity… more
    Amazon (08/16/25)
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  • Staff ASIC Design Verification

    Google (Mountain View, CA)
    …of Googles SOC offerings. You collaborate with hardware architects and design engineers for functional, power and performance verification of the ... Staff ASIC Design Verification Engineer, Platforms and Devices...to product release. + Experience strategizing and verifying digital logic at RTL and GLS level using SystemVerilog or… more
    Google (10/01/25)
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  • Principal Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …equivalent experience. + 7+ years of experience working on Computer Architecture and SoC design and verification principles, including using industry ... **Engineer** to join the team. **Responsibilities** + Lead an SoC verification team, owning verification ...with partners to drive continuous improvement to both the design , to verification plans/collateral, and tomethodologyto prevent,… more
    Microsoft Corporation (09/26/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …equivalent experience + 3+ years of experience working on Computer Architecture and SoC design and verification principles, including using industry standard ... Establish yourself as an integral member of a pre-silicon verification team, owning verification of SOC...with partners to drive continuous improvement to both the design , to verification plans/collateral, and to methodology… more
    Microsoft Corporation (09/25/25)
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  • ASIC Design Verification Engineer,…

    Amazon (Cupertino, CA)
    …system architecture and SoC architecture/micro-architecture solutions. * Participate in logic design activities as part of Amazon's machine learning custom ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...while also being deeply important to our customers. We design and build every component of our hardware and… more
    Amazon (09/16/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    …of relevant industry work experience. + Good understanding of Logic Design and Architecture. + Expertise in industry-standard verification flows like SV ... ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks Team is...Team is committed to deliver high-quality clocking and reset logic to various units in SOC and… more
    NVIDIA (09/23/25)
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  • Technical Lead Manager, ASIC Design

    Google (Sunnyvale, CA)
    …from early architecture phase through tapeout. + Knowledge of high performance and low-power design techniques. + Knowledge of ASIC Verification , Design For ... + 8 years of experience with IP Development or SoC Integration, from early architecture phase through tapeout. +...behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex… more
    Google (09/29/25)
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