- Meta (Sunnyvale, CA)
- …execution. 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and point out lower power and higher performance trade-offs. 4. ... and route, clock tree synthesis, static timing analysis, IR drop, EM, and physical verification in advanced technology nodes. 2. Resolve design and flow issues… more
- Meta (San Diego, CA)
- … Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and design for chip-level infrastructure and I/O logic 2. Achieve chip-level ... 5. Work cross-functionally with adjacent chip-level teams such as Verification , Physical Design , and Design -for-Test...design uArchitecture and RTL coding 9. Experience in SoC integration and ASIC architecture 10. Experience with at… more
- NVIDIA (Santa Clara, CA)
- … design . + A deep understanding of ASIC design flow including RTL design , verification , logic synthesis, timing analysis, ECO, and post silicon debug. ... an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's...relevant work or research experience. + Highly proficient in logic design , Verilog and/or System-Verilog, with a… more
- Google (Sunnyvale, CA)
- … bottlenecks to meet performance, power, and area targets. + Partner with logic design , architecture, and other engineering teams to ensure integration of ... equivalent practical experience. + 12 years of experience in SOC physical design and 3 years of...Place and Route, Static Timing Analysis, EM/IR analysis, Physical Verification , and Logic Equivalence Checking. Beyond project… more
- BrainChip, Inc. (Laguna Hills, CA)
- …or related degree or certification required 3+ years of experience in digital logic design Good understanding of modern computational architectures Fluent in ... BrainChip is seeking a Digital Design Engineer to join a team working on...modules. Program, debug, and build the FPGA for system verification . Use simulation tools to check the functionalities of… more
- Qualcomm (San Diego, CA)
- …and micro-architecture design of the ASIC, RTL design and synthesis, logic and timing verification . Complex IP level integration is also a requirement in ... verification , or related work experience. + Required strong design experience with background in SoC and/or...tools such as Lint & CDC + Experience in Logic design /micro-architecture/RTL coding is a must +… more
- Google (Sunnyvale, CA)
- …Design Engineer, Clock Design you will collaborate with the architecture, logic design DFT, physical design , and circuits/technology teams to overcome ... high speed clock distribution circuits. + Experience in Spice simulations, clock verification , and signoff. Preferred qualifications: + Experience in ASIC physical … more
- NVIDIA (Santa Clara, CA)
- …(SATA, PCIE, USB) preferred + Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling in RTL for mixed-signal blocks; Experience ... We are now hiring for a Senior Logic and Digital Circuit Design Engineer!...as one of the key IPs in many complex SoC . You'll work closely with analog designers and system… more
- NVIDIA (Santa Clara, CA)
- …visibility tools. + Great understanding of ASIC design flow including RTL design , verification , logic synthesis, timing analysis and bringup. + Strong ... with many other teams at NVIDIA. + Work closely with software, architecture, design , verification , and silicon validation teams. + Train and mentor junior… more
- NVIDIA (Santa Clara, CA)
- …networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification , logic synthesis and timing analysis. + Exposure to ... now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This position offers… more