• Sr. Physical Design Engineer, Annapurna…

    Amazon (Cupertino, CA)
    …analysis and trade-offs - Experience with modern ASIC/FPGA design and verification tools - Experience with SOC bring-up and post-silicon validation Amazon ... power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design methodologies… more
    Amazon (10/02/25)
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  • FPGA Digital Design Engineer 3/4

    Northrop Grumman (Los Angeles, CA)
    …with VHDL within the past 3 years . Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs . Experience with Electronic Design Automation (EDA) Tools: Vivado ... making history. Northrop Grumman Advanced Weapons has an opening for a FPGA Digital Design Engineer with an active clearance, to join our team of qualified, diverse… more
    Northrop Grumman (09/27/25)
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  • Silicon Architect, Reality Labs

    Meta (Sunnyvale, CA)
    …Work cross-functionally with SoC and IP architecture, performance/power modeling, logic design and verification , physical implementation, firmware, CAD, ... Architect who will collaborate with a world-class group of SoC and IP architects, modeling, development, and validation teams,... design issues 9. Hands-on experience in digital design , logic simulation, and performance analysis **Preferred… more
    Meta (08/01/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    … synthesis, and timing analysis of several modules. + Integrate modules into the overall SOC design and work closely with other teams in the silicon bring-up ... Science and related (or equivalent experience) + 5+ years of SoC design /integration experience, including architecture and implementation of system-level… more
    NVIDIA (09/30/25)
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  • ASIC Engineer

    Kelly Services (Folsom, CA)
    …and Requirements** + Focus is on interior chip architecture + Emphasis on SoC -level logic design and integration across multiple components + ... design , verification , and documentation for ASIC development. + Determines architecture design , logic design , and system simulation. + Defines module… more
    Kelly Services (09/30/25)
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  • Sr. FPGA Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    …digital designs + Experience in different stages of FPGA development: RTL design , verification , synthesis, timing analysis, lab bring up/validation + Experience ... As an Sr. FPGA engineer on the satellite digital design team, you will be designing, developing, and testing...integrating logic onto SoC platforms and designing high-throughput… more
    SpaceX (09/30/25)
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  • Silicon TPM

    Insight Global (Sunnyvale, CA)
    …in Silicon Development, SoC and IP. Familiarity with Design , Verification , Architecture with skills like Logic Design , Simulation, DFT, PD, ... SoC , IP and Silicon Development. Familiarity with Design , Verification , Architecture with skills like ...Design , Verification , Architecture with skills like Logic Design , Simulation, DFT, PD, Timing analysis… more
    Insight Global (09/27/25)
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  • Sr. Silicon Validation Engineer, DVT Silicon Dev

    Amazon (San Diego, CA)
    …validation or hardware verification . * Strong understanding of digital design , SoC architecture, and wireless modem (LTE/5G) principles. * Experience ... functionality (PHY/MAC), power, performance, and reliability. * Collaborate closely with design , RTL verification , firmware, and systems teams to root-cause… more
    Amazon (09/07/25)
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  • Sr. DSP and Wireless Systems Engineer, Digital RF…

    Amazon (San Diego, CA)
    …closely with internal inter-disciplinary teams such as ASIC/RFIC designers, FW/SW engineers, design verification engineers. You will drive key aspects of the ... . Develop and optimize HW/SW calibration algorithms for RF SOC and phased array systems . Architect HW and...test plans and test procedures for pre-silicon, help with design verification as well as post silicon… more
    Amazon (09/27/25)
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  • ASIC Engineer, Implementation

    Meta (Sunnyvale, CA)
    …related occupation. Requires one year of experience in the following: 16. 1. Logic synthesis and design optimization for Power, Performance, and Area 17. ... page. **Required Skills:** ASIC Engineer, Implementation Responsibilities: 1. Run logic /physical synthesis using advanced optimization techniques and generate optimized… more
    Meta (09/20/25)
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