• FPGA Engineer (Starship Electronics)

    SpaceX (Hawthorne, CA)
    …digital designs + Experience in different stages of FPGA development: RTL design , verification , synthesis, timing analysis, lab bring up/validation + Experience ... highly reliable firmware and gateware for SpaceX-designed hardware + Design and implement signal processing algorithms relating to communications...integrating logic onto SoC platforms and designing high-throughput… more
    SpaceX (07/15/25)
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  • Digital FPGA Engineer Level 4 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …Verilog within the past 3 years. + Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs + Experience with Electronic Design Automation (EDA) Tools: Vivado, ... The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In...or other STEM discipline with 8 years of digital verification engineering experience using industry standard simulation tools; 6… more
    Northrop Grumman (09/07/25)
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  • FPGA Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    …digital designs + Experience in different stages of FPGA development: RTL design , verification , synthesis, timing analysis, lab bring up/validation + Experience ... driven, and collaborative engineers. As an FPGA engineer on the satellite digital design team, you will be designing, developing, and testing FPGAs that supports… more
    SpaceX (09/30/25)
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  • Digital FPGA Engineer Level 3 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …Verilog within the past 3 years. + Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs + Experience with Electronic Design Automation (EDA) Tools: Vivado, ... The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In...or other STEM discipline with 5 years of digital verification engineering experience using industry standard simulation tools; 3… more
    Northrop Grumman (10/02/25)
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  • Senior Systems Prototyping Engineer

    NVIDIA (Santa Clara, CA)
    …on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). + Knowledge of ... be doing: + Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. + Improve performance… more
    NVIDIA (09/17/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …used by leading CPU/GPU/HyperScaler companies for pre-Silicon software validation of their SOC 's. You will develop new algorithms and optimizations for QoR (Quality ... of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement new algorithm and enhancements in C/C++ based… more
    Cadence Design Systems, Inc. (09/30/25)
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  • ASIC Engineer

    ManpowerGroup (Folsom, CA)
    design , verification , and documentation for ASIC development. + Determine architecture design , logic design , and system simulation. + Define module ... Evaluate all aspects of the process flow from high-level design to synthesis, place and route, and timing and...years of experience in ASIC development. + Expertise in SoC architecture and full end-to-end data-path. + Ability to… more
    ManpowerGroup (08/15/25)
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  • Software Engineer

    Leidos (San Diego, CA)
    …currently has an exciting opportunity for a **Software Engineer** to perform design , development, and hardware/software integration in _San Diego, CA_ for the ... of experts in implementing high-performance signal processing on custom system-on-chip ( SoC ) hardware and building tools that enable analysis, rapid prototyping, and… more
    Leidos (07/23/25)
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