- NVIDIA (Santa Clara, CA)
- … Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's leading SoC 's and GPU's. This position offers you a ... and development of the next generation GPU and SoC , allowing you to have real impact in a...What you will be doing: + Working with architects, design leads, physical design leads… more
- Meta (Sunnyvale, CA)
- …11. Experience in SoC integration and ASIC architecture 12. Knowledge of Physical Design and Low power implementation 13. Experience with Machine learning ... power machine learning accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital… more
- Microsoft Corporation (Mountain View, CA)
- …engineers to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... Architects + Analog mixed-signal designers + Verification engineers + Physical design and DFT teams + Other...to improve productivity and quality. + Industry-standard protocols and design standards relevant to SoC and IP… more
- NVIDIA (Santa Clara, CA)
- …the choice to join our dynamic team today! We are actively looking for Physical design Engineers with RTL2GDS experience to implement complex high performance ... and low power SOC 's. What you'll be doing: + Responsible to Floor...equivalent experience. + 6+ years of hands-on experience in Physical design . + Place and route tool… more
- Amazon (Sunnyvale, CA)
- …TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer , you will be part of an advanced architecture team that is exploring ... in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,...domains - Large breadth of knowledge from architecture through physical design - Knowledge of FPGA and… more
- Qualcomm (San Diego, CA)
- …Run various frontend tools to check for linting, clock domain crossing, etc + Work with physical design team on design constrain and timing closure + Work ... Inc. **Job Area:** Engineering Group, Engineering Group > DSP Architecture and Design **General Summary:** A variety of high performance, low power Hexagon cores… more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... + Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design . +… more
- Google (Goleta, CA)
- …computers. You will work as part of a team of digital, DV, Physical Design (PD), and RF/analog/mixed-signal engineers, collaborating with adjacent teams in ... JasperGold, VC Formal, Questa Formal, or 360-DV. + Knowledge of digital architecture/logic design techniques and principles. As a Silicon Engineer , you will be… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer , Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of ... in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA....in verifying complex blocks, clusters and top level for SoC + Prior experience building test benches from scratch,… more