- Microsoft Corporation (Austin, TX)
- …and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... AXI-4 protocol base other complex IP/blocks or subsystems. + Experience with IP/ SOC verification for a full product cycle from definition to silicon, including… more
- Meta (Austin, TX)
- …online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification plans, ... build verification test benches to enable IP/sub-system/ SoC level verification and develop functional tests based on verification test plan. 2.… more
- Arrow Electronics (Austin, TX)
- **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development * Develop… more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications. As a Formal Verification Engineer , you will be part of a team working with the best in the ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC … more
- Meta (Austin, TX)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...UVM methodology 10. 2+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM… more
- Meta (Austin, TX)
- …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work with… more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... concepts of CPU and SOC level micro-architectures. You will work on a selected...work on a selected part of the CPU Design Verification to ensure that it functions to the standards… more
- NVIDIA (Austin, TX)
- …The NVIDIA System-On-Chip ( SOC ) group is looking for an entry level ASIC Verification Engineer ! In this position you will have the chance to create a ... focus will be on verifying and improving the related verification methodologies for the corresponding design (RTL). For this... at multiple environment levels (eg, unit, sub-system, and SOC ). What you'll be doing: + Design and maintain… more
- Meta (Austin, TX)
- …Engineers within our Infrastructure organization. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... practical experience 9. 6+ years of experience in static verification tools 10. Experience with Lint, Clock Domain &...Clock Domain & Reset Domain crossing 11. Experience with SOC CDC signoff 12. Knowledge of SOC … more
- NVIDIA (Austin, TX)
- The NVIDIA System-On-Chip ( SOC ) group is looking for a top ASIC Verification Engineer interested in innovative approaches to drive design quality in our IP. ... array of products while collaborating with teams from design, architecture, verification , and integration. You should have real passion for innovation, methodology… more