• Exempt to Permanent - IS Engineer

    City and County of San Francisco (San Francisco, CA)
    …ONLY This is an Exempt to Permanent position in accordance with Class-Based Test (CBT) Civil Service Rules. This recruitment is restricted to current exempt ... District, or San Francisco City College, working within the 1044 Principal IS Engineer classification. This is a Citywide Exam posting. Your application to this… more
    City and County of San Francisco (11/12/25)
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  • SoC DFT Engineer , Google Cloud

    Google (Sunnyvale, CA)
    …Rule Checks (TDRC) and Design changes to fix TDRC violations to achieve high test quality. + Develop diagnostic databases, software and hardware for logic and ... SoC DFT Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA,...5 years of experience in DFT architecture, implementation, and verification for SoCs. + Experience in silicon bring-up, debug,… more
    Google (10/08/25)
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  • Lead Missile Systems Engineer 6 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …and is responsible for V&V of engineering across all program elements (systems/hardware/ software / support/integration and test ). Lead SE is typically responsible ... Northrop Grumman is currently seeking a **Lead Missile Systems Engineer 6** to support our Stand-in Attack Weapon (SiAW)...+ Experience with systems integration, test execution, test results documentation, and verification of missile… more
    Northrop Grumman (11/01/25)
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  • Sr. SOC/ASIC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools + Integration and verification of Design for Test (DFT) IPs and fabrics within Subsystems + ... Sr. SOC/ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
    SpaceX (11/18/25)
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  • Senior DV Engineer

    Capgemini (Santa Clara, CA)
    **About the Job You're Considering** We're seeking a **Design Verification Engineer ** for a **hybrid role** based in **Santa Clara, CA** or **Boston, MA** . This ... including testbench, reference models, and monitors/drivers. + Define comprehensive verification test plans using constrained random, directed testing,… more
    Capgemini (11/14/25)
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  • Senior Systems Engineer

    Safran (Irvine, CA)
    …and hardware components. Create test plans and schedules; develop test procedures and supporting documentation, execute verification tasks, and demonstrate ... Senior Systems Engineer **Job details** **General information** **Entity** Safran is...Functions: * Participate in the planning, design, development, and verification of systems. * Evaluate customer and operational needs… more
    Safran (10/04/25)
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  • Electrical Engineer

    Actalent (Los Angeles, CA)
    verification up to unit level and debug experience. + Experience writing test procedures and verification plans. + Proficiency in PCB/PCBA level debugging ... Electrical Engineer Job Description The Electrical Engineer ... verification . + Proficiency in developing and executing verification plans, test cases, and test more
    Actalent (11/18/25)
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  • Engineer Senior

    US Tech Solutions (Thousand Oaks, CA)
    …of design verification strategy. + Contribute to continuous improvement of test methods, design verification processes, and documentation practices in line ... of design verification strategy. + Contribute to continuous improvement of test methods, design verification processes, and documentation practices in line… more
    US Tech Solutions (11/07/25)
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  • Hardware Validation Engineer (CA)

    Insight Global (Fremont, CA)
    …product validation. Define the appropriate hardware, software , and procedures to test products under real-world conditions. - Verification and Scale Testing: ... equipment, and personal computing devices. This role will take ownership of test setup, independently execute verification and scale testing procedures, and… more
    Insight Global (09/30/25)
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  • ASIC/SOC DFT Engineer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    …hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year Design ... Scan Design Rule Check (DRC) tools + Integration and verification of Design for Test (DFT) fabrics...Verification Engineer /Level II: $150,000.00 - $180,000.00/per year Your actual level… more
    SpaceX (09/18/25)
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