- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop functional tests based… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are ... assertions and coverage driven verification . - Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments and… more
- Google (Sunnyvale, CA)
- …on TPU architecture and its integration within AI/ML-driven systems. As an ASIC Design Verification Engineer , you will be part of a team developing ASICs used ... or PhD in Electrical Engineering. + 6 years of experience in design verification . + Experience with UVM (Universal Verification Methodology). + Experience with… more
- Capgemini (San Jose, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Mixed-Signal Design Verification Engineer_ **Location:** _CA-San ... **Job Role: Senior** **Mixed Signal DV Engineer ** **Job Location: San Jose CA** **Job description:** We are seeking Mixed Signal DV Engineer who will extract… more
- Siemens (Fremont, CA)
- …Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on ... Job Family: Software Req ID: 232356 Are you ready to...range of areas from application engineering support and management, verification and validation of complex semiconductor ICs, system testing,… more
- Capgemini (San Francisco, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification (DV) Engineer_ **Location:** _CA-San Francisco_ ... **Job description:** Analog/Mixed-Signal Design Verification **Key responsibilities:** + Extract modeling specifications from...Develop timing model for the circuit working with layout engineer . + This role will provide the ability to… more
- Cisco (San Jose, CA)
- …of the ASIC in products. Your Impact: You are a hard-working, motivated ASIC verification engineer who will be joining our team and contributing to the ... will engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and interact with cross-functional software and product… more
- Siemens (Fremont, CA)
- Job Family: Software Req ID: 454920 Siemens EDA Business is a global technology leader in electronic design automation software . Our software tools enable ... design. Position Overview: The Product focused AE for Formal Verification will drive and grow Formal Verification ...or protected veteran status. Why us? Working at Siemens Software means flexibility - Choosing between working at home… more
- Broadcom (San Jose, CA)
- …**Job Description:** + Broadcom is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role you will be working on ... Engineering or Computer Engineering 8+ years of experience in Mixed Signal Design Verification or MSc in Electrical Engineering or Computer Engineering with 6+ years… more