- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... Chip (SoC) for data center applications. As a Formal Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
- Actalent (Los Angeles, CA)
- Job Title: Verification & Validation System EngineerJob Description The Verification & Validation System Engineer will delve deeply into component and ... system-level and network-level operations from concept through execution. Additionally, the engineer will integrate and perform verification of the end-to-end… more
- Meta (Sunnyvale, CA)
- …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work with… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are ... UVM, assertions and coverage driven verification . Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments and… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are ... assertions and coverage driven verification . - Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments and… more
- Capgemini (Santa Clara, CA)
- …you're considering** Join a collaborative and forward-thinking team as a Design Verification Engineer , contributing to the validation of advanced System-on-Chip ... high-quality silicon solutions. **Your role** + Architect and implement scalable verification environments using SystemVerilog and UVM for IP and SoC designs.… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position ... computing. What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will be...for memory subsystem units + Collaborate with architects, designers, software engineers across sites to accomplish your goals What… more