- Jet Propulsion Laboratory (Pasadena, CA)
- …Digital Electronics Group** . We are seeking a **Field Programmable Gate Array (FPGA) Verification Engineer IV** , responsible for the verification of the ... and signal processing systems. + Work with FPGA designers, system engineers, and software engineers. + Develop verification plans based on design specification… more
- Abbott (Alameda, CA)
- …CA, (alternatively Milpitas, CA or Beaverton, OR) currently has an opportunity for a Senior Software Test Engineer . # software **What You'll Do** + ... + Review System Specifications/Requirements documents, user stories and create verification test cases (based on those requirements),...to day guidance to the junior members of the software test team. Review work to ensure… more
- Hyundai Autoever America (Costa Mesa, CA)
- …and Verification Engineer , you are responsible for development of the verification strategy (outline test methods, test facilities and align to ... Purpose: The Sr. Systems Analyst & Verification Engineer position projects focused on...with the goal of discovering bugs/quality issues within the software . + Responsible for recording test progress… more
- Moss Adams LLP (San Diego, CA)
- ** Software Development Engineer in Test...frameworks + Develops and executes SQL scripts to create test data for functional verification and to ... SQL Server, Oracle and MySQL. **We deliver incredible value for our clients.** As a Software Development Engineer in Test , you will be a key member of our … more
- Palo Alto Networks (Santa Clara, CA)
- …to create an environment where we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in ... industry-leading requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test … more
- Capgemini (San Jose, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Mixed-Signal Design Verification Engineer_ **Location:** _CA-San ... **Job Role: Senior** **Mixed Signal DV Engineer ** **Job Location: San Jose CA** **Job description:**...model in System-Verilog, development of UVM Testbench and developing test cases and run simulation and fix the behavioral… more
- Siemens (Fremont, CA)
- …Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on ... Job Family: Software Req ID: 232356 Are you ready to...range of areas from application engineering support and management, verification and validation of complex semiconductor ICs, system testing,… more
- Capgemini (San Francisco, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification (DV) Engineer_ **Location:** _CA-San Francisco_ ... **Job description:** Analog/Mixed-Signal Design Verification **Key responsibilities:** + Extract modeling specifications from...in System-Verilog + Development of UVM Testbench and developing test cases! + Run simulation and fix the behavioral… more
- Qualcomm (San Diego, CA)
- …of GPU hardware, drivers, features, applications, and tools. + Creates and maintains verification test benches and environments in System Verilog/UVM + Create ... Software Engineering, Systems Engineering, or related work experience + Verification skills: Test planning, Scripting, Simulation, problem solving and debug.… more
- Northrop Grumman (San Diego, CA)
- …of history, they're making history. Northrop Grumman Aeronautics Systems has an opening for a Software Engineer in Integration and Test to join our team of ... work with multi-disciplinary teams, such as with Systems Engineering, Real-time & Embedded Software , Test Automation, DevSecOps and Systems Test **,** in… more