• ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
    Meta (03/09/25)
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  • ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop functional tests based… more
    Meta (02/12/25)
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  • ASIC Engineer , Design Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...ample opportunities to partner and collaborate with full stack software , hardware, ASIC Design, Emulation and Post-Silicon teams towards… more
    Meta (02/04/25)
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  • MLA IP Design Verification Engineer

    Amazon (Austin, TX)
    … solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards ... solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards… more
    Amazon (03/19/25)
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  • ASIC, Design Verification Engineer

    Meta (Austin, TX)
    …"Apply to Job" online on this web page. **Required Skills:** ASIC, Design Verification Engineer Responsibilities: 1. Develop functional tests based on ... verification test plan. 2. Drive Design Verification to closure based on defined verification ...with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality. **Minimum… more
    Meta (03/18/25)
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  • MLA IP Design Verification Engineer

    Amazon (Austin, TX)
    … solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards ... solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards… more
    Amazon (03/21/25)
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  • GPU Design Verification Engineer

    Qualcomm (Austin, TX)
    …verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification ... GPU hardware, drivers, features, applications, and tools. + Creates and maintains verification test benches and environments in System Verilog/UVM + Create and… more
    Qualcomm (04/23/25)
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  • Design Verification Engineer

    Amazon (Austin, TX)
    … solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards ... will help each team member develop into a better-rounded engineer and enable them to take on more complex...or CS or CE. - 3+ years of design verification experience using System Verilog and UVM - 3+… more
    Amazon (04/27/25)
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  • Sr. Principal Design verification

    Cadence Design Systems, Inc. (Austin, TX)
    …required > Minimum 10 years of experience in Processor based full chip verification / IP Verification Knowledge of Verilog/System Verilog, digital simulation and ... digital design fundamentals Skilled in many aspects of digital verification such as constrained random verification process,...is a plus Experience with RTL to Post Silicon Validation DV methodologies/flows is a plus Experience with perl,… more
    Cadence Design Systems, Inc. (02/04/25)
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  • Sr Software Design Quality Engineer

    Abbott (Irving, TX)
    …and/or modification of Risk Management Files, FMEA's, etc. Provides guidance on software safety classifications. + Design Verification / Validation - ... Our Irving, TX location is looking for a Sr. Software Design Quality Engineer . This person will...firm understanding of the design input, risk management, design verification , design validation and design output/transfer processes… more
    Abbott (04/11/25)
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