- Amazon (Sunnyvale, CA)
- …Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design -STA Engineer to continue to innovate on behalf of our ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip...& Route and other local/remote teams to address the design challenges in the context of timing sign-off. *… more
- Amazon (Cupertino, CA)
- Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire ... industry. We design and build every component of our hardware and...capabilities for our customers. We're seeking an experienced C/C++ engineer to join our embedded software team, where you'll… more
- SpaceX (Sunnyvale, CA)
- …who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre-silicon verification, post-silicon validation, ... Sr . RFIC Layout Designer (Silicon Engineering) Sunnyvale, CA...providing fast, reliable internet to 6M+ users worldwide. We design , build, test, and operate all parts of the… more
- Amazon (Cupertino, CA)
- …and validation. A day in the life A day in the life of an ASIC Engineer on the AWS Organization team focuses on operational excellence, constructively ... help your team evolve by actively participating in the code review process, design discussions, team planning, and ticket/metric/COE reviews. ASIC Engineers will… more
- Microsoft Corporation (Santa Clara, CA)
- …compared to CPU-based alternatives Microsoft DPU team in Santa Clara is looking for a Senior Design For Test Engineer to help develop their next generation ... hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data...experience. + 2+ years of industry experience as a Design For Test (DFT) engineer . + Hands… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
- Cisco (San Jose, CA)
- Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC ....optimize design that will integrate into the ASIC . Our team interacts with other Acacia groups including… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer ! ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
- BAE Systems (San Diego, CA)
- …awards. Other incentives may be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on ... and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who...testbenches in SystemVerilog/UVM, OVM, and/or VHDL + Experience with FPGA/ ASIC design and verification tools (Mentor Questa… more
- Microsoft Corporation (Mountain View, CA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Design Verification Engineer ** to join the team. **Responsibilities** + ... Establish yourself as an integral member of a design verification team for the development of AI components with focus on verifying functions and features. + Lead a… more