- Silvus Technologies (Irvine, CA)
- …or related fields. + Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs. + Deep knowledge of RTL design ... THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer- Signal Processing_** who will report to the _Senior Engineering Director_ in Irvine and… more
- Silvus Technologies (Los Angeles, CA)
- …career._ THE OPPORTUNITY Silvus is seeking a Principal R&D Engineer (https://jobs.lever.co/silvustechnologies/f6a37b7b-4f26-4de1-93c0-0bd116811d0a) who will report ... engagement with government and industry. + Work collaboratively within the senior Research and Development team on the following: + Executing larger,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …physical design flows and stages + Understanding impacts of analog and mixed- signal design and verification on digital -on-top development flow. + Exhibit ... team of engineers that can learn and improve existing digital flows. The candidate will primarily be responsible for...the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position… more
- Northrop Grumman (Los Angeles, CA)
- …a part of our mission! We are looking for you to join our team as a ** Principal ** / ** Sr . Principal Software Engineer** based out of Woodland Hills, CA. As ... a ** Principal ** / ** Sr . Principal Software...rewarding opportunity to be a part of our Enterprise-wide digital transformation. Through the use of Model-based Engineering, DevSecOps… more
- Northrop Grumman (Los Angeles, CA)
- …challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation. Through the use of Model-based Engineering, DevSecOps and Agile ... (SDR) systems for GPS, GNSS, and other cooperative signals along with advanced signal processing techniques to define new product lines + Work with leading-edge… more
- Teledyne (Goleta, CA)
- …analysis of the entire chip. This includes designing the circuitry of the signal path (detector interface, amplifiers, sampling, ADCs) and support circuitry (such as ... from transistor level simulations to system level analysis. This also means working with digital and layout engineers to ensure the entire chip works as intended the… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …enable static and dynamic transistor level analysis of the most advanced custom digital and mixed- signal circuits built for communication, IOT and AI markets. ... Must haves: + 8+ years of experience in development of EDA tools and one or more of transistor level timing, power, noise, aging, reliability, and emir analysis + Hardcore C++ Knowledge - Linux + Proficiency designing data structures, algorithms, and software… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …ATE deployment and production ramp. + Collaborate with internal teams (Analog/ Digital Design, DV, Program Management) to resolve technical issues. + Participate ... + Exposure to STA and RTL flows would be beneficial. + Familiarity with advanced mixed- signal verification and system simulation tools is a plus. Why Join Us? + Work… more
- RTX Corporation (Anaheim, CA)
- …by Collins Aerospace **Applied Signal Technology (AST** ) is seeking a ** Senior Principal SEIT Engineer** who strives for excellence and have a passion ... finest service members all while embracing integrity, innovation and work-life balance. The ** Senior Principal SEIT Engineer** will have a strong background in… more
- BAE Systems (San Diego, CA)
- …are preferred, but not required: + Perl/Python + C /Java + Git/Jira/BitBucket + Digital Signal Processing + Matlab/Simulink + Working knowledge of VHDL + FPGA ... Other incentives may be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)**… more
