- Microsoft Corporation (Santa Clara, CA)
- …Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer . You will join our front-end silicon team and be ... low power, scalable and programmable DPU silicon. As a Senior Silicon Engineer in the Data Processing...your career. **Responsibilities** + Own the micro-architecture specification and RTL development of design modules for ASIC… more
- NVIDIA (Santa Clara, CA)
- …GPUs and SOCs on standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, ... CA. What you'll be doing: + Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. +… more
- NVIDIA (Santa Clara, CA)
- …DFT, power distribution, timing, and place & route. Previous experience as a physical design engineer would be ideal. + Proficiency in C++ + Some familiarity ... times per day. We are seeking a CAD R&D Engineer excited to innovate in algorithms related to ECO...power optimization. A thorough understanding of both VLSI hardware design and efficient software implementations is key. Experience with… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... and deliver fully verified, high performance, area and power efficient RTL to achieve design targets + You will be working with architects, designers,… more
- NVIDIA (CA)
- We are now looking for a Senior Packaging Technical Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... ring, substrate interconnect scheme, and lead the package layout design process. + We collaborate with large teams consisting...RTL , Place and Route, substrate layout and system design Engineers and Managers. + Work to define a… more
- quadric.io, Inc (Burlingame, CA)
- …to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of ... the processor design cycle. Requirements + Contribute to the definition of...by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Firmware Engineer for our Memory Subsystem Team! Widely considered to be one of the technology world's most desirable employers, ... + 6+ years of proven experience in Boot architecture and firmware design . + Excellent RTL and digital design skills + Experience with high-speed IO… more
- Cisco (San Jose, CA)
- ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware + ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Siemens (Santa Clara, CA)
- …**Req ID:** 468177 Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around the world to ... the increasingly complex world of chip, board and system design .The StoryThere is a unique opportunity to get in...for an experienced Place & Route user or Applications Engineer to play a critical role in our US-based… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test ... and prototyping breakthrough Test Architectures for reticle sized, multi-chiplet products-from RTL to verification to post-silicon ATE bring-up. Join a globally… more