- NVIDIA (Santa Clara, CA)
- Are you seeking an outstanding opportunity? We are looking for a Senior Photonic Layout Design Engineer - someone who is excited to join a growing group of ... CMOS, Electronics, and Systems engineers + Conduct chip layout circuit design , circuit checking, and device evaluation and characterization. + Responsible for… more
- NVIDIA (Santa Clara, CA)
- …in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group of diverse ... mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in innovative sub-micron CMOS technologies using Cadence tools +… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of ... functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools. +… more
- Teradata (Sacramento, CA)
- …thrive as a key member of an Empowered Team? Join us as a Staff Systems Design Engineer and play a pivotal role in sustaining stable and reliable Mainframe ... customer satisfaction and business value + Drives solutions adoption (From Design to Implementation to User Acceptance) + Demonstrated Technical Qualifications… more
- Meta (Sunnyvale, CA)
- **Summary:** Join Meta Reality Labs as a Hardware Miniaturization Design Electrical Engineer and play a pivotal role in shaping the future of the Wearables ... excited for you to apply! **Required Skills:** Hardware Miniaturization Design Electrical Engineer Responsibilities: 1. Partner with...(NX), FEA, and other CAD suites. 22. Experience with design for six sigma, inclusive of structure … more
- AECOM (Orange, CA)
- …This career enhancing position will involve performing transportation structure design analysis, including plan preparation of structures in Los Angeles, ... Join us. **Job Description** **AECOM** is seeking a **Bridge Design Project Engineer III** to be based...structure type analysis evaluations. + Use current engineering design software. + Coordinate with other design … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the world of technology. Are you looking to re-enter the workforce as a Physical Design Application Engineer after taking a career break for caregiving? Who is ... and have a minimum of three years of Physical Design work experience. This role is not open to...offer a competitive On Target Earnings (OTE) incentive compensation structure . Please note that the salary range is a… more
- BAE Systems (San Diego, CA)
- …incentives may be available based on position level and/or job specifics. **Senior Design Verification Engineer - FPGA** **110464BR** EEO Career Site Equal ... advancing your career. BAE is looking for experienced FPGA Design Verification Engineers who can develop and use verification...note: This range is based on our market pay structures . However, individual salaries are determined by a variety… more
- BAE Systems (San Diego, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **112648BR** EEO Career ... career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop...note: This range is based on our market pay structures . However, individual salaries are determined by a variety… more
- Cisco (San Jose, CA)
- …With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more