- Cadence Design Systems, Inc. (San Jose, CA)
- …implementation and support activities associated with Cadence EDA tools for Synthesis , Logical Equivalency Checking (LEC), Design-for-Test (DFT), Place & Route and ... software in one or more of these areas: + Synthesis , DFT, Logical Equivalency Checking + Low Power Design...design and/or EDA + 4+ years of experience in Synthesis (Genus or Design Compiler), DFT and Logic Equivalency… more
- Teledyne (Goleta, CA)
- …circuits. Evaluates all aspects of the process flow from high-level design to synthesis , place and route, and timing and power use. Analyzes equipment to establish ... (asynchronous resets, and multi-clock domains). + Modular and synthesizable SystemVerilog. + Synthesis & Optimization + Logic synthesis with constraints (timing,… more
- Gilead Sciences, Inc. (Foster City, CA)
- …will participate a multi-disciplinary drug discovery team through the design and synthesis of new molecules. The successful candidate will have an excellent track ... record and a commitment to tackling drug discovery challenges through organic synthesis .. **Basic Qualifications** + Bachelors degree & 2+ years of relevant industry… more
- Amazon (Cupertino, CA)
- …EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis , PNR, and sign-off areas for advanced technology nodes. - Proficient in ... C++) - Solid understanding of ASIC physical design, and methodologies including synthesis , place and route, STA, IR, formal and physical verification. - Demonstrated… more
- Meta (Burlingame, CA)
- …areas such as 3D Texture and Shape Generation, Stylization and Neural View Synthesis . Our internships are twelve (12) to twenty-four (24) weeks long. **Required ... the area of 3D Generative AI for Texture and Shape Synthesis and Stylization and Neural View Synthesis 2. Present the outcomes of research findings as papers in… more
- Cedars-Sinai (Los Angeles, CA)
- …laboratory. The ideal candidate has strong expertise in the **design and synthesis of small molecules** , along with **classical structure determination** using ... field of research specialization. **Desirable Qualifications** + Experience in small-molecule synthesis and/or natural products' synthesis . + Experience in… more
- Meta (Sunnyvale, CA)
- …Skills:** ASIC Engineer, Implementation Responsibilities: 1. Run logic/physical synthesis using advanced optimization techniques and generate optimized gate ... and corresponding reset sequence for RDC. 10. Develop timing constraints for RTL- synthesis and PrimeTime-STA for blocks and top-level including SOC. 11. Analyze… more
- Microsoft Corporation (Mountain View, CA)
- …Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, synthesis /Lint/CDC/FEV and System on Chip (SOC) integration on different ... Clock Domain Crossing (CDC)/LINT closure. + 4+ years of experience in Synthesis , Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug… more
- NVIDIA (Santa Clara, CA)
- …to own micro-architecture, implement RTL, and deliver a fully verified, synthesis /timing clean design. + Support post-silicon validation activities. + Work with ... architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks. What we need to see: + Masters… more
- NVIDIA (Santa Clara, CA)
- …Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Collaborate and coordinate with architects, other ... designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks....of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. + Exposure to Digital systems… more