• VLSI CAD Engineer, ECO Tools - New College Grad

    NVIDIA (Santa Clara, CA)
    …in-house algorithms for steps such as incremental CTS (clock tree synthesis ), incremental scan insertion, power hookup, placement, timing optimization, etc. + ... field) or equivalent experience. + Experience across VLSI, including exposure to synthesis , clocks, DFT, power distribution, timing, and place & route. + Proficiency… more
    NVIDIA (07/14/25)
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  • Sr. CAD Engineer, ASIC

    Amazon (Sunnyvale, CA)
    …verification methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable digital design teams to meet ... verification methodology and debugging techniques - Familiar with basic Synthesis and Formal Verification methodology and flow development experience Preferred… more
    Amazon (07/10/25)
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  • ASIC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    …Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Support post-silicon validation activities. + Collaborate ... and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks. What we… more
    NVIDIA (07/10/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …GPU and Tegra chips. The team is also handling the architecture, design, and synthesis of multiple System-level modules. What you'll be doing: + Be an integral part ... You will be responsible for the RTL design, logic synthesis , and timing analysis of several modules. + Integrate...in ASIC design flow including RTL design, verification, logic synthesis and timing analysis + Strong coding skills in… more
    NVIDIA (06/19/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    …GPU and Tegra chips. The team is also handling the architecture, design, and synthesis of multiple System-level modules. What you'll be doing: + Be an integral part ... and Boot controllers. + You will be responsible for the RTL design, logic synthesis , and timing analysis of several modules. + Integrate modules into the overall SOC… more
    NVIDIA (06/18/25)
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  • Associate Scientist

    Amgen (Thousand Oaks, CA)
    …of synthetic chemistry, biochemistry, and chemical biology, and apply your chemical synthesis skills in developing new antibody drug conjugates to support the ... conjugates using analytical techniques, such as HPLC, LC-MS, and SEC. + Synthesis , purification and characterization of small molecule payloads and linkers + Operate… more
    Amgen (06/15/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …history of self-improvement and learning. You will have proven hands-on experience with Synthesis and PPA optimization on more advanced nodes and will combine your ... and EDA with an emphasis on Cadence tools of Synthesis , Physical Design & timing closure at 20nm or...Genus and Innovus + Experience in Logic Design and Synthesis , Formal Verification, Low Power design, Physical Design and… more
    Cadence Design Systems, Inc. (06/10/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Collaborate and coordinate with architects, other ... designers, pre- and post-silicon verification teams, synthesis , timing and back-end teams to accomplish your tasks....of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. + Exposure to Digital systems… more
    NVIDIA (06/10/25)
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  • Applied Scientist , GenAI Evaluation Media Science

    Amazon (Sunnyvale, CA)
    …Experience with multimodal understanding and foundation models Background in image/video synthesis , 3D computer vision, or visual quality assessment Track record of ... model building teams to leverage and enhance foundation models for visual synthesis and evaluation Build evaluation frameworks and metrics to measure visual quality,… more
    Amazon (06/06/25)
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  • Sr SOC Physical Design Engineer, Hardware Compute…

    Amazon (Sunnyvale, CA)
    …the block and Sub System level. - Drive block physical implementation through synthesis , formal verification, floor planning, bus / pin planning, place and route, ... (examples: Cadence, Mentor Graphics, Synopsys, or Others) to block design for synthesis , formal verification, floor planning, bus / pin planning, place and route,… more
    Amazon (06/05/25)
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