- SpaceX (Irvine, CA)
- …Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis /timing clean design + Work closely with verification team to ensure all ... timing constraint for those IPs and support the physical implementation team ( synthesis , timing closure, formality check) + Participate in silicon bring-up and… more
- NVIDIA (Santa Clara, CA)
- …of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design ... high-performance semiconductor designs. + Physical design expertise including hands-on synthesis experience, timing analysis, floor-planning and in-depth knowledge of… more
- Micron Technology, Inc. (Folsom, CA)
- …computing. In this role, you will lead full-chip floorplanning, top-level synthesis , and layout development for advanced HBM designs, while architecting high-speed ... family. **Responsibilities** + Own full-chip floorplanning, design partitioning, and top-level synthesis with multiple hard macro IP blocks. + Develop automated… more
- Broadcom (San Jose, CA)
- …or timing closure - floor-planning, partitioning, placement, clock tree synthesis , route, timing analysis, timing closure, physical verification (LVS/DRC). Should ... + Well experienced in floor-planning, partitioning, placement, clock tree synthesis , route and physical verification and/ or constraints development, constraints… more
- Amazon (Cupertino, CA)
- …area requirements. - Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis /timing clean design with constraints. - Perform lint and clock ... with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis , timing and back-end teams to accomplish your tasks. You will… more
- NVIDIA (Santa Clara, CA)
- …micro-architecture, implement in RTL, and deliver a fully verified, synthesis /timing clean design. + Collaborate with architects, verification engineers, formal ... deep understanding of ASIC design flows including RTL design, verification, logic synthesis and timing analysis. + Strong interpersonal skills and an excellent… more
- Google (Mountain View, CA)
- …+ Experience with methodologies for low power estimation, timing closure, and synthesis . + Experience managing technical teams. + Ability to drive a ... commitments and provide support to customers. + Participate in synthesis , timing/power estimation, and FPGA/silicon bring-up. Information collected and processed… more
- The County of Los Angeles (Los Angeles, CA)
- …at the Associate Analyst level**, involving the research, analysis, and synthesis of data related to contract development and administration, including conducting ... been at the Associate Analyst level, involving the research, analysis, and synthesis of data related to contract development and administration, including conducting… more
- US Tech Solutions (San Francisco, CA)
- …learning. + Explore and integrate AI tools to enhance research design, synthesis , and storytelling workflows. + Manage research vendors, budgets, timelines, and ... + Consumer Insights & Research + Marketing & Brand Strategy + Data Synthesis & Storytelling + Stakeholder Management **Education:** + Bachelor degree or equivalent… more
- University of Southern California (Los Angeles, CA)
- …course synthesizes a wide range of perspectives on the representation, creation, synthesis and understanding of landscapes and their meaning. Weekly lectures and ... Architecture + Urbanism Program We believe that landscapes are the dynamic synthesis of natural systems, socio-cultural forces and the physical material of the… more