• DSP Architect

    Broadcom (Irvine, CA)
    …+ Digital implementation of digital algorithms (based on Matlab algorithms from customer) + Assist Chip Verification , Design and analog teams for Chip ... solutions. The successful candidate will be instrumental in driving the hardware design and implementation of advanced digital systems within power constraints,… more
    Broadcom (02/11/25)
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  • Cloud Product Marketing Intern

    Cadence Design Systems, Inc. (San Jose, CA)
    …etc.) informing the target audience on the benefits of Cadence OnCloud product offering for chip verification and design . + Work with the Corporate Marketing ... optimizing digital content + General understanding of the EDA and System Design Workflow + Pursuing undergrad degree in Electrical/ relevant engineering… more
    Cadence Design Systems, Inc. (03/14/25)
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  • Design Verification Engineer…

    SpaceX (Sunnyvale, CA)
    Design Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... this possible, with the ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (04/15/25)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    …for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification ... responsible for the verification closure of a design module or sub- system from test-planning, UVM...like Video, AI/ML and Networking designs. 17. Experience with verification of ARM/RISC-V based sub- systems or SoCs.… more
    Meta (05/06/25)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    …for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification ... responsible for the verification closure of a design module or sub- system from test-planning, UVM... like Mercurial(Hg), Git or SVN. 18. Experience with verification of ARM/RISC-V based sub- systems or SoCs.… more
    Meta (04/18/25)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    …for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification ... responsible for the verification closure of a design module or sub- system from test-planning, UVM... - SV Assertions, Formal, Emulation 18. Experience with verification of ARM/RISC-V based sub- systems or SoCs… more
    Meta (03/19/25)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    …for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification ... responsible for the verification closure of a design module or sub- system from test-planning, UVM... like Mercurial(Hg), Git or SVN 16. Experience with verification of ARM/RISC-V based sub- systems or SoCs… more
    Meta (03/08/25)
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  • Asic Manager, Design Verification

    Meta (Sunnyvale, CA)
    …"Apply to Job" online on this web page. **Required Skills:** Asic Manager, Design Verification Responsibilities: 1. Work with researchers and architects defining ... for the different modules and top levels. 3. Drive Design Verification to closure based on defined...and reference models and 14. 5. Experience in block/IP/SoC/full chip level verification . **Public Compensation:** $272,316/year to… more
    Meta (03/27/25)
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  • HBM Digital Design Engineer

    Micron Technology, Inc. (Folsom, CA)
    …circuits in Logic die of HBM chip . Collaborate with cross site design and verification team members contributing to Fullchip integration and simulation. ... in Electrical Engineering or related field. Position requires: 1. Mixed-signal verification ; 2. Digital design principles, techniques, and standard… more
    Micron Technology, Inc. (04/12/25)
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  • Senior ASIC Design Verification…

    Cisco (San Jose, CA)
    …experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. * Experience in ... You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products....plans, direct and random tests, code or functional coverage, multi- chip / system simulation, and performance analysis. * Collaborate… more
    Cisco (03/05/25)
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