• SOC Verification and Methodology Engineer…

    Qualcomm (San Diego, CA)
    …you will be responsible for ensuring the quality and functionality of System -on- Chip (SOC) designs through comprehensive verification processes. You ... the art tools, verification techniques and methodologies to verify varied design IPs in addition to system -level integration validation aspects. **Key… more
    Qualcomm (02/12/25)
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  • SOC Verification and Methodology Engineer

    Qualcomm (San Diego, CA)
    …you will be responsible for ensuring the quality and functionality of System -on- Chip (SOC) designs through comprehensive verification processes. You ... the art tools, verification techniques and methodologies to verify varied design IPs in addition to system -level integration validation aspects. **Key… more
    Qualcomm (04/18/25)
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  • Senior ASIC Verification Engineer, Coherent…

    NVIDIA (Santa Clara, CA)
    …scripting ability and an expertise in System Verilog. + Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like ... As a ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent interconnects for our mobile SoCs… more
    NVIDIA (04/11/25)
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  • Application Support Engineer - Advanced…

    Siemens (San Diego, CA)
    …of technology and physics to deliver better products in the increasingly complex world of chip , board, and system design . * Candidate must be located in ... engineers, and managers to develop or enhance complex computer-aided engineering design or manufacturing processes. Uses computer-aided systems to assist… more
    Siemens (03/04/25)
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  • ASIC Engineer, Formal Verification

    Meta (Sunnyvale, CA)
    …looking for individuals with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification ... at the block level 2. Work with Architecture and Design teams to come up with Formal Verification... Design teams to come up with Formal Verification specification and implementation 3. Define Formal Verification more
    Meta (05/09/25)
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  • ASIC Engineer, Formal Verification

    Meta (Sunnyvale, CA)
    …looking for individuals with experience in Formal Verification to build IP and System On Chip (SoC) for data center applications. As a Formal Verification ... 17. Experience to quickly understand and interpret specifications and extract design behaviors/properties 18. Experience in formal property verification of… more
    Meta (03/22/25)
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  • Formal Verification Product focused…

    Siemens (Fremont, CA)
    …technology and physics to deliver better products in the increasingly complex world of chip , board, and system design . Position Overview: The Product focused ... are required BSEE or equivalent, 10+ years of experience in semiconductor design , verification , and formal verification . EDA Functional Verification more
    Siemens (03/04/25)
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  • R&D/Software Engineering - Questa…

    Siemens (Fremont, CA)
    …in the increasingly complex world of chip , board, and system design . Category : R&D/Software Engineering - Questa Verification IQ -UX/UI Experience : 6 ... Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around...to 10 years About the group : Questa Verification IQ Product It is a core R&D team… more
    Siemens (03/04/25)
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  • Sr SOC Verification Engineer, Annapurna ML

    Amazon (Cupertino, CA)
    …Basic Qualifications - BS Degree or Higher in EE or CS or CE. - 8+ years of design verification experience using System Verilog and UVM - 8+ YOE in testbench ... levels of design including: custom blocks, IP blocks, sub- systems , and fullchip SOC system testing. - Experience using multiple verification platforms. -… more
    Amazon (03/07/25)
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  • ASIC DFT Verification Technical Leader

    Cisco (San Jose, CA)
    …work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification . What You'll Do: * ... planning and development of test benches to verify comprehensive Design -for-Test (DFT) architecture that supports ATE screening, in- system...the design * Work closely with the design / design - verification and PD teams to… more
    Cisco (04/18/25)
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