• Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …in the US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs ( System on Chip ) live at the heart of AWS Machine Learning servers. As ... trade-offs. Key job responsibilities Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips… more
    Amazon (07/26/25)
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  • Design Automation Engineer

    Broadcom (San Jose, CA)
    …various EDA offerings from major EDA suppliers in semiconductor industry for IP and chip design + The ideal candidate will have wide-ranging experience, with a ... design cockpits + Regression testing of flows and verification checks + Parasitic extraction and simulation, abstract and...and Mixed-Signal IP development + Familiarity with software & design data management systems like git, DesignSync… more
    Broadcom (04/29/25)
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  • Sr. ASIC Design Engineer, Cloud-Scale…

    Amazon (Cupertino, CA)
    …mindset - Have familiarity with accelerator design , interconnects, DMAs, Memory sub- systems , CPU cores, SIMDs, debug and system level architectures - Have ... and Japan, and customers across all industries. Custom SoCs ( System on Chip ) live at the heart...and synthesis, timing, and back-end experts * Lead and Design to meet requirements or solve a system more
    Amazon (06/14/25)
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  • Senior ASIC Design Engineer

    Cisco (San Jose, CA)
    …+ Develop and analyze functional coverage. + Help define, evolve, and support our design methodology. + Collaborate with the verification team to address ... Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - Hardware +… more
    Cisco (07/11/25)
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  • CPU Floorplan and Integration Engineer, San Diego

    Qualcomm (Santa Clara, CA)
    …and power grid planning. + Skilled in physical design , integration, and verification of large processor and system -on- chip (SoC) designs. + Extensive ... CPU PD Engineer, you will work with microarchitecture, RTL design and physical design teams to ...within a team environment. + In-depth understanding of Physical Verification methodologies. Preferred qualifications + 2+ years of practical… more
    Qualcomm (06/05/25)
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  • Staff RFIC Design Engineer

    Skyworks (Irvine, CA)
    …in all phases of product development, including product definition, architecture, system , transistor-level circuit design , MCM design , layout/layout ... using SOI, SiGe or CMOS technologies. + Develop circuit architecture, design , layout floor-planning, layout supervision, simulation, verification , and production… more
    Skyworks (07/09/25)
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  • Sr. Manager, Analog Mixed Signal IC Design

    Teledyne (Camarillo, CA)
    …factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration ... customers include NASA, ESA, the US Department of Defense, instrument/ system integrators, and commercial customers. Teledyne's infrared sensors are Everywhere… more
    Teledyne (04/29/25)
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  • Sr. Solutions Architect, Hitech Electronics…

    Amazon (East Palo Alto, CA)
    …cloud hosted chip design frontend, backend, orchestration, automation, design verification , and tooling - Experience developing software and hardware ... The Amazon Web Services (AWS) Solutions Architect team partners with customers to design and build some of the most scalable, flexible and resilient cloud… more
    Amazon (07/09/25)
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  • Principal CPU Systems Debug…

    Qualcomm (Santa Clara, CA)
    …RTL design to target power, performance, area and timing goals. * Functional verification support. Help the design verification team execute on the ... Summary:** We are hiring a talented engineer for CPU System Debug Architecture/RTL engineer targeted for high performance, low...functional verification strategy. * Performance verification support. Help verify that the RTL … more
    Qualcomm (07/20/25)
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  • ASIC Physical Design Engineer, Annapurna…

    Amazon (Cupertino, CA)
    …custom silicon solutions * Participate in various aspects of physical design : full chip floorplanning, circuit analysis, power/clock distribution, timing ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...and healthy, and managing the full lifecycle of our systems at the huge scale and complexity of AWS.… more
    Amazon (06/17/25)
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