• Server RAS Architect

    Qualcomm (Santa Clara, CA)
    …architect to join our team. If you possess a deep understanding of CPU system design and have a passion for architecting and designing complex, high ... server SoCs. + In-depth understanding of the interaction of on- chip errors and error handling flows with system...architectural solutions to meet those requirements + Work with design and verification teams to ensure implementation… more
    Qualcomm (07/08/25)
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  • Silicon Architect, Reality Labs

    Meta (San Diego, CA)
    …Work cross-functionally with SoC and IP architecture, performance/power modeling, logic design and verification , physical implementation, firmware, CAD, and ... power management of SoCs with multiple clock and voltage domains for battery-operated systems 11. Experience deploying chip pervasive logic such as clock… more
    Meta (07/23/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Product Marketing (PM) team to influence the development of software tools for advanced chip design platforms. As engagement focused PE, you will be focused on ... preferably on Genus and Innovus + Experience in Logic Design and Synthesis, Formal Verification , Low Power...scripting essential + Knowledge of HDL - Verilog or System Verilog is preferred + Bonus to have logic… more
    Cadence Design Systems, Inc. (06/10/25)
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  • Sr. RFIC Layout Designer (Silicon Engineering)

    SpaceX (Sunnyvale, CA)
    …alongside world-class cross-disciplinary teams ( systems architecture, ASIC design , firmware, pre-silicon verification , post-silicon validation, product ... to deploy Starlink, the world's most advanced broadband internet system . Starlink is the world's largest satellite constellation and...Python or similar language + Experience managing revision control systems + Experience with circuit design +… more
    SpaceX (06/19/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    …including Reset and Boot. + Collaborate with architects, ASIC designers, and verification engineers to design sophisticated system -level modules such ... years of SoC design /integration experience, including architecture and implementation of system -level functions like Reset or Chip Boot + Solid frontend ASIC… more
    NVIDIA (06/18/25)
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  • Machine Learning Hardware Architect, Google Cloud

    Google (Sunnyvale, CA)
    …including XLA (Accelerated Linear Algebra) compiler, Platforms performance, package, and system design to transition innovations to production and maintain ... experience. + 5 years of experience in computer architecture, chip architecture, IP architecture, co- design , performance analysis,...a unified approach to modeling and system optimization.The ML, Systems , & Cloud AI… more
    Google (07/09/25)
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  • Senior DFx/RTL Engineer

    Cisco (San Jose, CA)
    …IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. + ... on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in… more
    Cisco (07/22/25)
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  • DFT Engineer - CPU

    Qualcomm (Santa Clara, CA)
    …smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify ... the DFT and DFD ( Design for Debug) architecture, implementation, and test plans for...We're doing a ground up implementation of a new chip architecture, so you'll have to ability to affect… more
    Qualcomm (07/04/25)
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  • Lead Architect - NVLink Fusion

    NVIDIA (Santa Clara, CA)
    …across design , verification , PD, and IP teams. Join the future of chip design , you will work on groundbreaking products with a dedicated team! Your base ... you are a motivated individual that understands how SoC systems are architected and built, has intimate knowledge of...are architected and built, has intimate knowledge of digital design , and understands chip development cycles, this… more
    NVIDIA (06/19/25)
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  • Electrical Engineer

    Teledyne (Chatsworth, CA)
    …with all levels of technical team members and leadership + Assist in system -level/card-level/ chip -level architectural definition + Prepare design concepts to ... and existing Teledyne Controls products. This includes responsibility for conceptual design , detailed design , checkout, integration, verification ,… more
    Teledyne (05/30/25)
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