- Amazon (Austin, TX)
- …Basic Qualifications - BS Degree or Higher in EE or CS or CE. - 8+ years of design verification experience using System Verilog and UVM - 8+ YOE in testbench ... levels of design including: custom blocks, IP blocks, sub- systems , and fullchip SOC system testing. - Experience using multiple verification platforms. -… more
- Siemens (Austin, TX)
- …of technology and physics to deliver better products in the increasingly complex world of chip , board, and system design . Job Description: We are seeking a ... Req ID: 452804 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop… more
- Meta (Austin, TX)
- …netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications. **Required ... Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to… more
- Meta (Austin, TX)
- …5. Work cross-functionally with adjacent chip -level teams such as Verification , Physical Design , and Design -for-Test **Minimum Qualifications:** Minimum ... Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and design for chip -level infrastructure and I/O logic 2. Achieve chip… more
- NVIDIA (Austin, TX)
- …industry-standard scripting languages + Experience in RTL design (Verilog), verification (SystemVerilog), System -On- Chip design /implementation flow, ... impact on the world. Join the NVIDIA System -On- Chip (SOC) group as an ASIC Design ...+ Excellent debugging and analytical skills + Exposure to design and verification tools (dc_shell or equivalent… more
- Micron Technology, Inc. (Richardson, TX)
- …product, and most of the DDR or LPDDR design is based on the gate-level design only while the Logic chip can use a full ASIC flow. Lastly, verification ... uses information to enrich life. As an HBM SOC Design and Integration Engineer, you will be responsible for...stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called… more
- Micron Technology, Inc. (Dallas, TX)
- …product, and most of the DDR or LPDDR design is based on the gate-level design only while the Logic chip can use a full ASIC flow. Lastly, verification ... enrich life. As a MTS | DMTS HBM SOC Design Engineer, you will be responsible for the ...stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called… more
- Amazon (Austin, TX)
- …in the US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs ( System on Chip ) live at the heart of AWS Machine Learning servers. As ... power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design methodologies… more
- Amazon (Austin, TX)
- …in the US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs ( System on Chip ) live at the heart of AWS Machine Learning servers. As ... power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical design methodologies… more
- Meta (Austin, TX)
- …design for low-power interconnect and power management IPs 2. Contribute to chip -level integration, verification plan development and verification . 3. ... **Summary:** We are growing our ASIC Design and uArchitecture team within RL and are...Support hand-off and integration of blocks into larger System -on- Chip environments. 4. Work with architects to… more
Recent Jobs
-
Intern - Electrical Engineering
- Dentsply Sirona (Milford, DE)
-
Test & Reliability Engineer | Software Testing
- Gecko Robotics (Pittsburgh, PA)
-
Sr. Database Administrator
- Meijer (MI)
-
(USA) Senior, Software Engineer
- Walmart (Dallas, TX)