• Design Verification Engineer

    Meta (Sunnyvale, CA)
    …and verifications skills to implement the testing infrastructure to validate new core IP or System on Chip ( SoC ) implementations. You will work closely with ... transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will...verification and UVM methodology 10. 2+ years experience in IP/sub- system and/or SoC level verification based on… more
    Meta (08/01/25)
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  • Silicon Engineer, Digital Design , Quantum…

    Google (Mountain View, CA)
    design methodologies for clock domain checks, reset checks, and low power design . + Experience in collaborating with system and hardware architecture, ... field. + 5 years of experience with digital logic design principles and RTL design concepts. +...at least one of these areas: CPU Processor Cores, Buses/Fabric/Network-on-a- Chip , Debug/Trace, Interrupts, or Clocks/Reset. Be part of a… more
    Google (08/08/25)
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  • Sr Software I&T Engineer , KGS Integrated…

    Amazon (Northridge, CA)
    …test and verification at various products levels including but not limited to system -on- chip ( SoC ) calibration algorithm verification, silicon wafer and ... be responsible for developing the architecture and executing the design , build, and validation of test systems ...test of circuit boards with complex microcontrollers, system -on- chip (SOCs), or FPGAs - Experience in design more
    Amazon (07/25/25)
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  • Sr. SDE, MLA hardware/software co- design

    Amazon (Cupertino, CA)
    …different subsystems in the SoC . If you have a solid background in embedded software, system development or chip design , come join us! About the team Why ... our machine learning chips. You will work with architecture, design and emulation teams to build new silicon functionality....such as firmware and device drivers * Knowledge in SoC architecture * Knowledge in IO(PCIE, AXI) , Memory(HBM,… more
    Amazon (06/12/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …**Principal Design Engineer** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. Microsoft's mission is to empower ... to improve productivity and quality. + Industry-standard protocols and design standards relevant to SoC and IP...Industry-standard protocols and design standards relevant to SoC and IP development (eg, AMBA/AXI, PCIe, JESD204, USB,… more
    Microsoft Corporation (07/25/25)
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  • Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    …related (or equivalent experience) + 5+ years of SoC design /integration experience, including architecture and implementation of system -level functions like ... design and implement the world's leading GPU and SoC 's. With the System -ASIC team, you will...or Chip Boot + Solid frontend ASIC design skills, including RTL design , asynchronous and… more
    NVIDIA (06/18/25)
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  • Senior Architect, C2C

    NVIDIA (Santa Clara, CA)
    …Physical layer) + Experience with existing interconnects (PCIE, UCIE, Chip to Chip links) + Able to define system architecture with NVLINK-C2C interconnects ... now looking for a Senior Architect for our NVLink chip to chip team! NVIDIA is seeking...protocols CHI/CXL/AXI + Collaborate with multi-functional teams including IP, SoC , physical/package design , firmware, electrical design more
    NVIDIA (07/12/25)
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  • Embedded System Software Engineer (Smart…

    TP-Link North America, Inc. (Irvine, CA)
    …+ Familiarity with embedded operating systems (eg, RTOS, Linux) and real-time system design . + Experience with hardware interfaces such as UART, SPI, I2C, ... About Us: Headquartered in the United States, TP-Link Systems Inc. is a global provider of reliable...effortless lifestyle. Overview: We are seeking a Junior Embedded System Software Engineer (Smart Home) to design ,… more
    TP-Link North America, Inc. (06/09/25)
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  • Silicon Architect, Reality Labs

    Meta (Sunnyvale, CA)
    …for feature improvements to our chassis generators 3. Work cross-functionally with SoC and IP architecture, performance/power modeling, logic design and ... power management of SoCs with multiple clock and voltage domains for battery-operated systems 11. Experience deploying chip pervasive logic such as clock… more
    Meta (08/01/25)
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  • Silicon Engineer, Design Verification,…

    Google (Goleta, CA)
    …of experience with design verification. + Experience verifying digital systems using SystemVerilog/UVM. + Experience with SoC Verification including CPUs, ... JasperGold, VC Formal, Questa Formal, or 360-DV. + Knowledge of digital architecture/logic design techniques and principles. As a Silicon Engineer, you will be a… more
    Google (08/08/25)
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