• Lead ASIC DFT Engineer

    Google (Mountain View, CA)
    …members of the DFT team to deliver overall deliverables for two or more subsystems in a System on a Chip ( SoC ). + Responsible for overall DFT execution right ... a scripting language such as Perl or Python. + Knowledge of high performance design DFT techniques like Streaming Scan Network (SSN), High-Bandwidth IJTAG. Be part… more
    Google (08/08/25)
    - Related Jobs
  • HBM PHY Expert, Annapurna Labs

    Amazon (Cupertino, CA)
    …with architects, design teams, software engineers to deliver the next generation ML chip . In this position, you will have the opportunity to be responsible for ... cloud. Mentorship & Career Growth We're continuously raising our performance bar as we strive to become Earth's Best...of experience in Silicon development with -3+ years in SOC /IO/Subsystems -Good understanding of DDR/HBM at the PHY and… more
    Amazon (07/10/25)
    - Related Jobs
  • Sr. HBM PHY Expert, Annapurna Labs

    Amazon (Cupertino, CA)
    …with architects, design teams, software engineers to deliver the next generation ML chip . In this position, you will have the opportunity to be responsible for ... cloud. Mentorship & Career Growth We're continuously raising our performance bar as we strive to become Earth's Best...of experience in Silicon development with -3+ years in SOC /IO/Subsystems - Good understanding of DDR/HBM at the PHY… more
    Amazon (06/06/25)
    - Related Jobs