• Physical Design Flow and Methodology…

    Google (Sunnyvale, CA)
    Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... in a semiconductor environment. + Experience developing automated physical design workflows from RTL to GDS, utilizing Tcl, Python,...focus on TPU architecture and its integration within AI/ML-driven systems . In this role, you will be a part… more
    Google (09/28/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP ... power the world's Data Centers, Automobiles, Cloud and Wireless Systems . We offer amazing opportunities to grow in your...and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Staff Engineer , Electrical Design

    Celestica (San Jose, CA)
    …California City: San Jose **Summary** The Staff Engineer , Electrical Design - Power develops new electrical systems /circuits for various applications/ ... system ideas and draw up plans for these systems , and capture them in schematics and system...efforts. + May manage relationships with key vendors/partners. + Design , modify and implement systems that meet… more
    Celestica (07/23/25)
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  • Senior Staff Engineer , Hardware…

    Celestica (San Jose, CA)
    Senior Staff Engineer , Hardware Design Req ID: 127748 Band: 11 Region: Americas Country: USA State/Province: California City: San Jose **Summary** As a Technical ... planning, design , and architecture of high- quality, complex hardware systems + Work with different constituencies including Product Group Technology Leads,… more
    Celestica (08/08/25)
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  • Physical Design Methodology and DevOps…

    NVIDIA (Santa Clara, CA)
    …you can make a lasting impact on the world! We are now looking for a Physical Design Methodology and DevOps Engineer ! This is a DevOps role where you will be ... mechanisms for coordinating and maintaining a large number of semiconductor design tasks across multiple datacenters. + Building web interfaces to configure,… more
    NVIDIA (10/16/25)
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  • ASIC Engineer , IP Design , Silicon

    Google (Mountain View, CA)
    ASIC Engineer , IP Design , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and mentoring ... practical experience. + 8 years of experience with RTL design using Verilog/ System Verilog and microarchitecture. + Experience with a scripting language… more
    Google (10/03/25)
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  • Principal Engineer , Standards…

    MetroLink (Los Angeles, CA)
    …the operator of the METROLINK Commuter Rail System , is seeking a Principal Engineer , Design and Standards, who will support the design and ensure ... Principal Engineer , Standards and Design Print (https://www.governmentjobs.com/careers/scrra/jobs/newprint/5114820) Apply  Principal Engineer , Standards and… more
    MetroLink (10/16/25)
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  • Sr. Principal ASIC/Analog Design

    Teledyne (Goleta, CA)
    design teams of 3 to 5 engineers on an image sensor are small, so each engineer is responsible for the design trades and implementation of a large portion of ... volume cell phone and automotive cameras to high-end performance systems for security and search and track applications. This...both peers and customers to instill confidence in the design + Collaborate with other designers and system more
    Teledyne (10/02/25)
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  • Senior Mixed-Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    We are looking for an Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real ... of our circuit verification team, you will verify the design and implementation of the industry's leading GPU +...component and top level circuit verification + Expertise in System Verilog or similar HVL + Have strong debugging… more
    NVIDIA (10/04/25)
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  • Design and Analysis Engineer

    The Boeing Company (Long Beach, CA)
    …Avionics & Flight Controls (AVFC) team is seeking a mid-career (Level 3) **Electrical Engineer ** to perform Design , Integration and Test activities in support of ... status.** **Position Responsibilities:** + Software development, integration, and test + System qualification and test + Migration of software components to .NET… more
    The Boeing Company (10/08/25)
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