• Senior Software Engineer - Python Numerical…

    NVIDIA (Santa Clara, CA)
    …will be a crucial member of a team that is working to unlock the power of distributed GPU computing for domains such as scientific computing, data analytics, deep ... for accelerated numerical/scientific computing libraries + analyze and improve the performance of developed APIs on various CPU and GPU architectures, especially… more
    NVIDIA (06/04/25)
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  • Software Development Engineer II, AWS Web…

    Amazon (East Palo Alto, CA)
    Description This role is to develop highly-scalable, high performance , and secure platform libraries, frameworks, services that can impact thousands of AWS builders ... to design, build, and operate robust, highly scalable, high performance platform services that form the backbone of AWS...trust our robust suite of products and services to power their businesses. Utility Computing (UC) AWS Utility Computing… more
    Amazon (04/09/25)
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  • Senior Manufacturing Test Development…

    Google (Sunnyvale, CA)
    …creating manufacturing test strategies that cover from structural through functional and system test. Be part of a team that pushes boundaries, developing custom ... silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide.… more
    Google (06/12/25)
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  • Silicon Security Engineer

    Google (Mountain View, CA)
    …of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the ... will shape the next generation of hardware experiences, delivering unparalleled performance , efficiency, and integration. Google's mission is to organize the world's… more
    Google (05/16/25)
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  • Senior Analog Mixed Signal Design Engineer

    Qualcomm (San Diego, CA)
    …of one or more blocks. * Defines and runs own simulations and analyses (eg, power , performance ) on designs; documents and utilizes results to improve and verify ... references, comparators. Determines architecture design and circuit specifications based on system level requirements. Is actively involved in all aspects of the… more
    Qualcomm (05/10/25)
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  • ASIC Design Engineer

    Broadcom (San Jose, CA)
    …You will involve in engineering implementation spec writing from marketing/ system requirements, RTL design and verification, synthesis, static timing analysis. ... 8 years of experience developing, implementing, and testing high performance communications/networking ASIC products. Experience in mapping communications algorithms… more
    Broadcom (04/26/25)
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  • Sr. Embedded S/W Engineer , AWS Solutions

    Amazon (Cupertino, CA)
    …Key job responsibilities You will serve as the technical lead for embedded systems through the entire product life cycle, from inception and roadmap through design ... Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences Amazon values diverse experiences. Even if you do… more
    Amazon (06/03/25)
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  • Staff Epitaxy Process Engineer , Raxium

    Google (Fremont, CA)
    …in Manufacturing, Quality, or Product Engineering for hardware technology and systems . + Experience in technical leadership, project management, and executive ... of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the… more
    Google (05/30/25)
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  • Static Timing Analysis Engineer

    Google (San Diego, CA)
    …of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the ... expertise will shape the next generation of hardware experiences, delivering unparalleled performance , efficiency, and integration. The US base salary range for this… more
    Google (05/29/25)
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  • VLSI Design Engineer for Server / Data…

    Qualcomm (San Diego, CA)
    …a fast-paced SoC team responsible for RTL Design, flows and methodology for high performance ASICs in the latest process nodes for High Performance Compute and ... interfaces + Great understanding of design techniques for speed and for power efficiency + Oversee definition, design, verification, and documentation for ASIC… more
    Qualcomm (05/16/25)
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