- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are ... across multiple disciplines - Deliver detailed test plans for verification of the full chip or sub- system ...standard buses like AMBA AXI4 - Experience with formal verification - Experience with post-silicon validation -… more
- Capgemini (Santa Clara, CA)
- …the job you're considering** We're looking for a collaborative Senior Mixed-Signal Design Verification Engineer to help shape the future of SoC development. In ... this role, you'll contribute to the validation of high-performance ARM-based systems , working across...and innovative problem-solving. **Your role** + Develop and implement verification environments using SystemVerilog and UVM for IPs and… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers... and UVM methodology 10. 2+ years experience in IP/sub- system and/or SoC level verification based on… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks Team ... and multi-platform support. What you'll be doing: + Own validation of Clocking structures in Tegra and GPU products...Hands on industry-standard tools and state of the art verification methodologies. This includes coding in System … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with ... is your place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based… more
- NVIDIA (Santa Clara, CA)
- …CHI, ACE, ATB) and PCIe. We are specifically seeking a skilled ASIC Verification Engineer with deep knowledge of System Verilog, UVM, and C++, along with a ... NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next...+ Design and implement constrained-random and directed testbenches using System Verilog and UVM to achieve verification … more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/SoC ... verification plans, build verification test benches to enable block/IP/sub-...cross functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality. **Minimum… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and drive next ... and NOC. 4. Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub- system /SoC level verification . 5.… more
- Cisco (San Jose, CA)
- ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... qualify use-case requirements. You'll also have the opportunity to work with systems -testing teams during post-silicon validation efforts to bring-up, debug and… more
- Meta (Sacramento, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC ... verification plans, build verification test benches to enable IP/sub-...cross-functional teams like Design, Model, Emulation, and and Silicon validation teams towards ensuring the highest design quality. 3.… more