- Meta (Austin, TX)
- …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work with… more
- Meta (Austin, TX)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ System on Chip (SoC) ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design … more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a agile team working… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part of an agile team… more
- Meta (Austin, TX)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers... and UVM methodology 10. 2+ years experience in IP/sub- system and/or SoC level verification based on… more
- Meta (Austin, TX)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC ... verification plans, build verification test benches to enable IP/sub-...cross-functional teams like Design, Model, Emulation, and and Silicon validation teams towards ensuring the highest design quality. 3.… more
- Qualcomm (Austin, TX)
- …of GPU hardware, drivers, features, applications, and tools. + Creates and maintains verification test benches and environments in System Verilog/UVM + Create ... experience. **PREFERRED QUALIFICATIONS:** + 5+ years Hardware Engineering, Software Engineering, Systems Engineering, or related work experience + Verification … more
- Amazon (Austin, TX)
- …shortening the DV cycle. Innovators will be delighted with our integrated verification / validation environment that is used to perform architectural modeling to ... and sub- systems for testability/verifiability - Write comprehensive block and system level testplans - Build assertions, traffic generators and scoreboards -… more
- Amazon (Austin, TX)
- …Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, SystemC and DPI-C ... report progress to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal...systems - Familiarity with Matlab - Modem design verification experience - System C or Matlab… more
- Amazon (Austin, TX)
- …solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards ... solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress...EE or CS or CE. 3+ years of design verification experience using System Verilog and UVM… more