- Microsoft Corporation (Mountain View, CA)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be ... responsible for pre-silicon functional verification , creation of verification environments and tests...equivalent experience. + 4+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging… more
- BAE Systems (San Diego, CA)
- …be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **117193BR** EEO Career ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments.… more
- Teradyne (Agoura Hills, CA)
- …Life Cycle so that Teradyne maintains its quality leadership in the Automated Test Equipment (ATE) industry. The Software Quality Engineer is an integral ... Teradyne Quality Engineering team is looking for a highly motivated, energetic, software engineer who will work collaboratively with the test and development… more
- Ford Motor Company (Palo Alto, CA)
- …connected vehicles and services. As a Senior System Software Integration and Validation Engineer , you will play a critical role in ensuring the quality and ... automotive systems. You will be responsible for designing, developing, and executing verification and validation activities to ensure that our software meets the… more
- Broadcom (San Jose, CA)
- …subsystem among many other IPs. **Requirements:** * Experience in architecting modern verification environment and test benches * Deep understanding and ... defining block and sub-system level test plans, creating reusable test benches, and driving verification closure * Hands on experience in CDC check, formal … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... Work on a unit level testbench, working on directed and random tests and test infrastructure, and contributing to the future direction of the methodology for the… more
- Broadcom (San Jose, CA)
- …Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. + Drive Test plans for all features for ... it in an efficient way. + Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead… more
- Broadcom (San Jose, CA)
- …Functional Coverage gaps and improve tests to cover the gaps + Document verification strategy including Test plans, Verification Environment, pseudo-random ... Must have a good understanding of all aspects of Verification from building Testbenches, developing Test plans...aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage. + Must… more
- Amazon (Sunnyvale, CA)
- …Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, SystemC and DPI-C . ... you will: . Implement a state of the art verification environment to facilitate testing of the RTL against...the RTL against reference Matlab/C models . Develop detailed test plans and write tests, run regressions, collect coverage… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. Join us today! We are now looking for a Senior System Verification Engineer to join our Emulation division and will be working onsite ... SOCs, Switch, NIC on emulation, root causing system level test fails and emulator environment issues. + Bring-up and...of CPU - GPU coherency + Experience with UVM verification environments and scripting with Perl, Python and C/C++… more