- Qualcomm (San Diego, CA)
- …to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, ... currently seeking candidate whose primary role is to implement and validate low power design intent requirements at the SoC- level . The role also expands to power… more
- Qualcomm (San Diego, CA)
- …Architecture and Design team at Qualcomm has an opening for Package/System Design Engineer . This team is responsible for road mapping, architecting, ... including hard macro block placement, padring, RDL and bump pattern/assignment - System level co- design methodology of IC, Package and PCB/Board - Concept… more
- Broadcom (San Jose, CA)
- …static timing analysis. You will either be responsible for block and/or chip level design and integration. Job Requirements BSEE/MSEE. Minimum 8 years of ... , verification, and synthesis. Must have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with reusable HDL coding styles… more
- Qualcomm (Santa Clara, CA)
- …that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support the world's best ... with EDA vendors to define roadmap and to resolve tool issues **Minimum Qualifications:** * Bachelor's degree in Electrical...in place-and-route of high-performance chips - either in a design or CAD role + High level … more
- Siemens (Fremont, CA)
- …459541 We are seeking a talented and detail-oriented Mid- Level Software Quality Assurance Engineer to join our IC Design products team. In this role, you ... before release to our customers in the semiconductor industry. Key Responsibilities + Design and execute test cases for IC design , verification, and… more
- Qualcomm (Santa Clara, CA)
- …for Block level Physical Implementation. Experience in low power physical design with ICC2/FC tool set, good debugging and scripting (TCL/PERL) skills ... The candidate will be responsible to complete critical block level physical design implementation from netlist to...Requirements: - 2+ yrs. of working experience in physical design with ICC2/FC tool set from netlist… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Signal Integrity Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... and various system components in 3D EM tools. + System- level signal integrity simulations in any one of the...tool /methodology. + Package substrate and board layout SI design constraint creation, review with pre/post layout SI +… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …on the world of technology. As an expert Digital Implementation Field Applications Engineer (AE) , you will work side-by-side with our leading edge customers. With ... and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts...tools and technologies + Efficiently translate customer requirements into tool solutions by working closely with R&D Job Requirements… more
- Qualcomm (San Diego, CA)
- …Pathfinding Engineer , you will work with Architecture, RTL, Physical Design , Circuits, CAD and Post-Silicon teams to lead the cutting-edge technology development ... Strong data analytical skills to identify and address physical design issues. + Experience in pre-post silicon correlation Roles...propose impactful PPA optimizations. + Engage with external CAD tool vendors and internal CAD teams to identify and… more
- Umbra Lab (Santa Barbara, CA)
- …that has never meaningfully existed before. We are seeking a Senior FPGA Design Engineer (Space Systems), developing HDL based digital designs supporting ... to the highest quality commercial satellite data available, which is an indispensable tool for the growing number of organizations monitoring the Earth. We empower… more
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