• Sr Staff Security Software Engineer (Threat…

    Palo Alto Networks (Santa Clara, CA)
    …kind of precision that drives great outcomes. **Your Career** Threat Detection Engineer (Threat Data Platform) The Threat Data Platform team specializes in providing ... is a must + Strong understanding of fundamental software design for data access and processing larger datasets (REST/SQL/BQ/Mongo/etc...For candidates who receive an offer at the posted level , the starting base salary (for non-sales roles) or… more
    Palo Alto Networks (11/15/25)
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  • Skunk Works Subsystem Design

    Lockheed Martin (Palmdale, CA)
    …Development Programs \(Skunk Works(R)\) in Palmdale, California, as a full\-time Subsystem Design Engineer \. Dive into the heart of aerospace innovation, where ... Lockheed Martin Aeronautics, we're taking innovation to the next level \. From designing the most advanced air vehicle to..., Creo, Unigraphics, NX, or equivalent 3\-D Computer Aided Design \(CAD\) tool \- Experience creating and/or… more
    Lockheed Martin (11/04/25)
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  • Structures Design Engineer

    Lockheed Martin (Palmdale, CA)
    **Description:** Lockheed Martin Aeronautics in seeking a full\-time Airframe Structures Design Engineer for the Advanced Development Programs \(ADP\) in ... education considered \- Experience with CATIA V5 or equivalent 3\-D Computer Aided Design \(CAD\) tool \- Experience with structural design \-… more
    Lockheed Martin (11/04/25)
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  • Electromechanical Design Engineer

    Northrop Grumman (Los Angeles, CA)
    …making history. **Northrop Grumman Advanced Weapons** has an opening for an **Electromechanical Design Engineer Level 4** with an active clearance **,** ... design using Creo + Familiar with Creo cabling tool + Familiar with Creo best practices + Familiar...to mentor others EPLM (Teamcenter) experience is preferred. Primary Level Salary Range: $137,400.00 - $206,000.00 The above salary… more
    Northrop Grumman (10/17/25)
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  • Sr. SOC/ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    …weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer /Senior: $170,000.00 - $230,000.00/per year Your actual level and base ... Sr. SOC/ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) Sunnyvale,...and drive efforts to resolution + Work with EDA tool vendors to evaluate new tools, solve bugs, improve… more
    SpaceX (11/18/25)
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  • Sr. Physical Design Methodology…

    Amazon (Cupertino, CA)
    …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers...flows/methodologies for PPA and TAT improvements Work with EDA tool vendors to evaluate new methods, resolve bugs, improve… more
    Amazon (10/25/25)
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  • Senior Staff Engineer , Hardware…

    Celestica (San Diego, CA)
    …logger, IR camera, wind tunnel, air speed meter etc. + Advanced knowledge of Mechanical design tool such as Pro/E considered a plus. + Advanced knowledge of ... drive to find the way for our customers. Let's engineer the future together. Responsible for architecting, implementing, and...will drive system architecture of end to end thermal design from rack level down to the… more
    Celestica (11/05/25)
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  • Sr Principal Design Engineer

    Northrop Grumman (San Diego, CA)
    …history. The Mission Enabling Products (MEP) Business Unit is seeking a Senior Principal Design Engineer to join our team. Northrop Grumman MEP Business Unit ... This position is located in San Diego, CA. The Design Engineer is responsible for developing and...materials and assembly methods (bonding/fastening) + Ability to perform design of complex, multi-piece tool assemblies to… more
    Northrop Grumman (09/19/25)
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  • Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... tool decisions. - Experience in high-performance, low-power physical design , and implementation techniques with industry standard synthesis, PnR, or Signoff… more
    Amazon (09/02/25)
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  • ASIC Floorplan Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    We are now looking for a ASIC Floorplan Design Engineer - NCG. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... or similar HVL + Experience with CAD and physical design methodologies (flow and tool development), chip...salary range is 96,000 USD - 161,000 USD for Level 1, and 108,000 USD - 184,000 USD for… more
    NVIDIA (10/23/25)
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