- Northrop Grumman (San Diego, CA)
- …of history, they're making history. Explore a career engineering what's possible as a Digital Design Engineer in San Diego, CA. **What You'll Get to Do:** Our ... the beach Southern California is famous. As a Digital Design Engineer at Northrop Grumman, you will...DSP, MATLAB, and SimuLink + Experience with the Electronic Design Automation (EDA) Tool Quartus. + Knowledgeable… more
- Lockheed Martin (Sunnyvale, CA)
- **Description:** Join us as a **Circuit Design Engineer ** where you will design and develop hardware and circuits for complex satellite and rocket test and ... perform hardware engineering best practices to include: requirements analysis, design , and software/hardware integration\. Location: **Although this position does… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Physical Design Engineer ** to join the team. **Responsibilities** + Accountable for ... Design -for-Test (DFT) & Functional mode Timing Analysis and convergence...with industry-standard EDA tools such as Synopsys, and Cadence tool suites. + Partner effectively with PD, DFT, STA… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... tool decisions. - Experience in high-performance, low-power physical design , and implementation techniques with industry standard synthesis, PnR, or Signoff… more
- Northrop Grumman (Mcclellan, CA)
- …of Northrop Grumman Mission Systems (NGMS) is seeking a motivated **Integrated Circuit (IC) Design CAD Support Engineer ** to join our team by supporting the ... Close interaction and collaboration with the analog and digital design engineers + Provide CAD tool support...CAD capabilities **Basic qualifications for Principal Integrated Circuit (IC) Design CAD Support Engineer :** + Bachelor's degree… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... or similar HVL + Experience with CAD and physical design methodologies (flow and tool development), chip...CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and… more
- Northrop Grumman (San Diego, CA)
- …of history, they're making history. Explore a career engineering what's possible as a Digital Design Engineer in San Diego, CA. **What You'll Get to Do:** Our ... beach Southern California is famous. As an Electrical/ Digital Design Engineer at Northrop Grumman, you will...for Software Defined Radios + Experience with the Electronic Design Automation (EDA) Tool , Quartus. + Knowledgeable… more
- Broadcom (Irvine, CA)
- …The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are ... seeking a motivated and technically strong engineer to join our team. Job Description: + Leading...constraints with the customer and interface with the physical design team + Responsible to drive state of the… more
- NVIDIA (Santa Clara, CA)
- We are looking for a highly motivated Senior Thermal Product Design Engineer to join this dynamic and innovative team to support the next generation of products ... One Team model , you will support collaborative product design and development activities focusing on one business and...+ Strong proficiency in at least one thermal simulation tool (eg, Icepak, Flotherm, Fluent) + Hands-on experience and… more
- SanDisk (Milpitas, CA)
- …where you'll be at the center of innovation. We are looking for an experienced Engineer to lead and deliver projects for our Memory Design team. This is ... revenue opportunities for the company. Join the Memory Technology Design Team and become a leader of this highly...Cadence Encounter or Innovus + Familiarity with revision control tool and EDA standard formats used in cell/library development… more