- BAE Systems (San Diego, CA)
- …may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **113449BR** EEO Career ... career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop...and verification tools (Mentor Questa or Cadence) + Proven track record of managing and executing to schedules, and… more
- Meta (Sunnyvale, CA)
- …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...video transcoding. We are looking for individuals with demonstrated track record that spans one or more of the… more
- NVIDIA (Santa Clara, CA)
- …team today! The Advanced Technology Group is looking for a highly motivated Principal Physical Design Engineer to join our group. Do you have a proven EE ... background with an in-depth understanding of physical design , place and route, timing analysis, power analysis, IR... chip implementation on advanced silicon node technologies + Track record of production chip work + P&R CAD… more
- Amazon (Cupertino, CA)
- …design (DDR, PCIe, USB, etc.) with emphasis on signal integrity - Proven track record in impedance control, stack-up design , and power integrity optimization ... Description AWS Infrastructure Services owns the design , planning, delivery, and operation of all AWS...team is looking for you! The AWS Board Core Design & Services team drives system innovation in the… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …+ Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, ... how to best utilize Cadence technologies to achieve their design goals and meet project schedules + Conduct technical...analysis skills covering digital implementation is critical. + Proven track record and experience working in a fast paced… more
- NVIDIA (Santa Clara, CA)
- …signal integrity. + Familiarity with industry standards and guidelines for PCB layout design + Track record of working on projects involving high-speed ... BGAs pinouts, optimizing signal integrity and manufacturability. + Collaborate with design teams to define product requirements, specifications, and goals. +… more
- NVIDIA (Santa Clara, CA)
- …or Computer Engineering (or equivalent experience) + Minimum 7 years' experience in Physical Design Engineering + Proven track record of PPA improvement on high ... What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs,...(Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes + Develop flows… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …have experience with Allegro PCB Editor with knowledge of high speed design rules and routing strategies, High Density Interconnect (HDI) and basic knowledge ... of Rigid-Flex Design . Responsibilities: + Running design benchmarks and...for problem solving + Strong analysis skills with a track record to prove it + Strong communication skills… more
- Amazon (Cupertino, CA)
- Description As a member of the AWS Board Core Design & Services team, you will own next-generation server components with a strong focus on PCIe design , from ... in the life Hardware engineers within AWS Board Core Design & Services team could be working in a...Experience with PCIe compliance testing and validation - Proven track record in PCIe performance optimization and root cause… more
- quadric.io, Inc (Burlingame, CA)
- …utilities + Develop directed/random drivers, assembly or C++ programs to efficiently test the design + Use coverage metrics to track and communicate progress on ... verification Requirements + At least 5 years of experience in design verification for CPU or GPUs. + Deep knowledge of leading verification methodologies for CPU or… more
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