- Northrop Grumman (Mcclellan, CA)
- …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... to join our diverse team today! As a Senior Digital Design Verification Engineer at...models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM . + Build… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and … more
- Amazon (Sunnyvale, CA)
- …networking and satellite bus FPGAs A day in the life Kuiper Production team FPGA verification engineer . Create UVM verification simulation solutions. The ... Description Kuiper Production team FPGA Verification engineer . Creating & Maintaining ...will work with design and systems teams to define/develop/implement/test/release UVM test environments in order to verify FPGA based… more
- SpaceX (Irvine, CA)
- Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As a Silicon Verification Engineer , you ... mindset, which will align successfully in the organization. **Job Title:** Silicon Verification Engineer **Location:** Mountain View, CA **What's the Job?** +… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...years of hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology 10. 2+ years… more
- Amazon (Sunnyvale, CA)
- …Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced engineering and research ... with team members across multiple disciplines - Deliver detailed test plans for verification of complex digital design blocks by working with design engineers… more
- Tarana Wireless (Milpitas, CA)
- …will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... as Python What You'll Need: + BSEE required/MSEE preferred + 5-12 years of related Verification experience + Strong knowledge of UVM + Proficiency with at least… more
- Capgemini (Santa Clara, CA)
- …you're considering** Join a collaborative and forward-thinking team as a Design Verification Engineer , contributing to the validation of advanced System-on-Chip ... to deliver high-quality silicon solutions. **Your role** + Architect and implement scalable verification environments using SystemVerilog and UVM for IP and SoC… more