- Cisco (San Jose, CA)
- ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... Verilog / UVM programming + 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools + Experience with scripting languages Python or… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of InterestEngineer - ... the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You...relevant experience required; prior experience with System Verilog and UVM methodology + Prior experience in verifying complex blocks,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
- Broadcom (San Jose, CA)
- …**Job Description:** + Broadcom is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role you will be working on ... 6+ years of of experience in Mixed Signal Design Verification + Hands on experience in SV UVM...+ Familiarity with generating randomized vectors for analog and digital behavioral model verification + Hands-on knowledge… more
- Amazon (Sunnyvale, CA)
- …in Electrical / Communications Engineering - 10+ years of experience in digital verification , preferably in communication systems - Familiarity with Matlab ... highly differentiated silicon into Amazon Cameras and Doorbells. Our verification team works on state-of-the art SoCs in a...in communication systems - 3+ years of experience in UVM , C, System C, and scripting Preferred Qualifications -… more
- Amazon (Sunnyvale, CA)
- …in Electrical / Computer Engineering or related field - 6+ years experience in digital verification , preferably in image processor, SoC/Interfaces - 3+ years of ... TCL) - 6+ years experience in System Verilog or UVM Preferred Qualifications - Master's or PH.D in Computer...in Computer Engineering - 8+ years of experience in digital verification , preferably in areas of image… more
- Meta (San Diego, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... drive our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or… more
- John Deere (Torrance, CA)
- …, ASIC -_ _2025106_ **_Onsite/Remote:_** _Onsite Position_ **Your Responsibilities** As a ** Digital Design Engineer , ASIC** for John Deere in Torrance, CA, ... personnel; + Develop and/or execute test or analysis plan for product verification and validation; + Provide technical support to marketing, manufacturing, quality… more
- Amazon (Sunnyvale, CA)
- …in System level verification using test benches constructed using System Verilog, UVM , System C and/or DPI-C. . Ensure that the block meets DFT, timing and ... work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This...Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit… more
- Amazon (San Diego, CA)
- …block . Work with the verification team and participate in System level verification using test benches constructed using UVM , System C and DPI-C . Ensure ... Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon… more