• ASIC Engineer , Infra Silicon Lifecycle

    Meta (Sunnyvale, CA)
    …Preferred Qualifications: 11. Experience in ASIC Design, Development or Validation (Silicon bringup, validation , emulation , characterization, ... **Summary:** Meta is hiring an ASIC Engineer within the Infrastructure organization. The Infra Silicon Enablement team is looking for individuals with experience in… more
    Meta (09/12/25)
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  • Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …interconnect fabric. + Collaborate extensively with Architecture, SW/FW, Design, Modeling, Emulation , and Post-Silicon Validation teams to ensure comprehensive ... NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and...+ Exposure to coherency modeling tools, verification IPs, or emulation platforms (eg, Veloce, Palladium). + Experience in GPU-based… more
    NVIDIA (09/25/25)
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  • Senior Design Verification Engineer , HW…

    Amazon (Sunnyvale, CA)
    …powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a part ... will participate in the lab bring-up of these blocks either in FPGA, emulation , or silicon by potentially writing test scripts, analyzing lab data, proposing… more
    Amazon (09/04/25)
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  • Silicon Verification Engineer

    ManpowerGroup (Mountain View, CA)
    Our client, a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As a Silicon Verification Engineer , you will be ... which will align successfully in the organization. **Job Title:** Silicon Verification Engineer **Location:** Mountain View, CA **What's the Job?** + Focus on… more
    ManpowerGroup (08/20/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
    Meta (08/01/25)
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  • Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …prototype and provide a pre-silicon platform for early software development, system validation , and hardware regressions. Protium is leading product in FPGA ... Emulation /Prototyping domain. This role is to design, verification, timing...role is to design, verification, timing closure and hardware validation of the FPGA IPs. + Developing field-programmable gate… more
    Cadence Design Systems, Inc. (08/08/25)
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  • Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …each other-every day. Job Responsibility Protium is leading product in FPGA Emulation /Prototyping domain. This role is to design, verification, timing closure and ... hardware validation of the FPGA IPs. + Developing field-programmable gate...+ Working on FPGA IP Design, Verification/Simulation, Timing closure, Validation of IP on the hardware; + Enhancing current… more
    Cadence Design Systems, Inc. (07/09/25)
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  • Data Center Firmware Test Architect

    NVIDIA (Santa Clara, CA)
    …our flagship super computers and data center offerings. If you are a dedicated engineer with a deep understanding of firmware and date center systems, and you thrive ... Test Strategy: Own and drive the overall test architecture and validation strategy for firmware across multiple NVIDIA platforms-from pre-silicon simulation and… more
    NVIDIA (07/12/25)
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