• Design Verification (DV) Engineer

    Cisco (San Jose, CA)
    Design Verification (DV) Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1440031) + Location:San Jose, California, US + Area of InterestEngineer - ... be responsible for the entire verification process + Develop the verification environment, including crafting and implementing test plans, and perform any… more
    Cisco (07/10/25)
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  • Senior Custom SOC IP Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a Senior Custom SOC IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with ... collaborate with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right verification more
    NVIDIA (06/27/25)
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  • Applications Engineer Consultant EDA…

    Siemens (Fremont, CA)
    …across a range of areas from application engineering support and management, verification and validation of complex semiconductor ICs, system testing, and ... Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on… more
    Siemens (06/17/25)
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  • Sr. Systems Analysis and Verification

    Hyundai Autoever America (Costa Mesa, CA)
    …and Verification Engineer , you are responsible for development of the verification strategy (outline test methods, test facilities and align to ... Purpose: The Sr. Systems Analyst & Verification Engineer position projects focused on...product requirements) as well as reporting out on test readiness, test results and product technical… more
    Hyundai Autoever America (04/17/25)
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  • ASIC Engineer , Design Verification

    Meta (Menlo Park, CA)
    Engineer , Design Verification Responsibilities: 1. Define and implement IP/SoC verification plans, build verification test benches to enable ... IP/sub-system/SoC level verification and develop functional tests based on verification test plan. 2. Collaborate with cross-functional teams like Design,… more
    Meta (06/26/25)
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  • ASIC Verification Engineer

    Cisco (San Jose, CA)
    ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... responsible for the entire verification process. You will develop the verification environment, including creating and executing test plans, and perform any… more
    Cisco (06/25/25)
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  • ASIC Verification Engineer - New…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... Work on a unit level testbench, working on directed and random tests and test infrastructure, and contributing to the future direction of the methodology for the… more
    NVIDIA (05/22/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... Work on a unit level testbench, working on directed and random tests and test infrastructure, and contributing to the future direction of the methodology for the… more
    NVIDIA (07/11/25)
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  • GPU Design Verification Engineer

    Qualcomm (San Diego, CA)
    …of GPU hardware, drivers, features, applications, and tools. + Creates and maintains verification test benches and environments in System Verilog/UVM + Create ... with Architecture, Software , Firmware, Design , Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content… more
    Qualcomm (06/06/25)
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  • Sr. ASIC Design Verification

    Amazon (San Diego, CA)
    …Work with tool vendors and drive enhancements in emulation methodology . Participate in the validation of FPGAs using test benches, which can be reused for the ... the design and communication systems team and participate in system level verification using test benches constructed using UVM, System C and DPI-C . Develop a… more
    Amazon (06/17/25)
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