- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... that changes to the design are verifiable + Architect and plan the verification strategy and execution for sub-system features impacting your unit + Support… more
- Arrow Electronics (Mountain View, CA)
- **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC ... and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development * Develop complex self… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks Team is ... of the clocks and resets design has increased many folds. This requires sophisticated verification to deliver a bug free clocks design to power our product lines… more
- SpaceX (Irvine, CA)
- Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... with the ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies. + Build and reform… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience in verification methodologies and languages such as Universal Verification Methodology (UVM) ... an emphasis on computer architecture. + Experience in low-power design verification . + Experience with Universal Verification Methodology (UVM), SystemVerilog,… more
- Capgemini (Santa Clara, CA)
- …considering** Join a collaborative and forward-thinking team as a Design Verification Engineer, contributing to the validation of advanced System-on-Chip (SoC) ... high-quality silicon solutions. **Your role** + Architect and implement scalable verification environments using SystemVerilog and UVM for IP and SoC designs.… more
- Amazon (Sunnyvale, CA)
- …Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced engineering and research team ... development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... that changes to the design are verifiable + Architect and plan the verification strategy and execution for sub-system features impacting your unit + Support… more
- The Boeing Company (Huntington Beach, CA)
- …Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate or Mid-Level)** to join us as part of ... is a unique time where we're hiring design and verification engineers at every level as we're only limited...and around the world and support ASIC/FPGA design and verification for electronics that we build in El Segundo… more