- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part of an agile team working with the best in the… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the ... doing: + As a key member of our ASIC Verification team, you will verify the design and implementation...working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our GPU… more
- Broadcom (San Jose, CA)
- …team responsible for state-of-the-art subsystem development to meet customer requirements. The engineer will be responsible for a variety of advanced verification ... tasks such as: verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as… more
- Broadcom (San Jose, CA)
- …custom AI chips. This position is responsible for IP and subsystem verification , including SerDes and processor subsystem among many other IPs. **Requirements:** * ... Experience in architecting modern verification environment and test benches * Deep understanding and...benches * Deep understanding and knowledge of industry standard verification methodologies and tools * Hands on and In-depth… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... that changes to the design are verifiable + Architect and plan the verification strategy and execution for sub-system features impacting your unit + Support… more
- Insight Global (Irvine, CA)
- …next-generation wearable insulin-delivery systems. They are looking for a hands-on Design Verification Lead to drive verification activities for their patch-pump ... reflect design intent. This is a highly visible, high-impact position for an engineer who thrives in regulated environments and enjoys both leading and being… more
- Ford Motor Company (Palo Alto, CA)
- …connected vehicles and services. As a Senior System Software Integration and Validation Engineer , you will play a critical role in ensuring the quality and ... automotive systems. You will be responsible for designing, developing, and executing verification and validation activities to ensure that our software meets the… more
- Broadcom (San Jose, CA)
- …and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. + Drive Test plans for all features for Block/Core/SOC and ... and get to full Functional coverage and bring the Verification to closure + Debug Regression failures, analyze Functional...in an efficient way. + Lead the documentation of verification strategy including Test plans, Verification Environment,… more
- Amazon (Sunnyvale, CA)
- …technologies. In this role you will: . Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . ... in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . Work with the… more
- NVIDIA (Santa Clara, CA)
- …role offers a great opportunity to be at the forefront of compiler verification , ensuring our brand-new technology maintains its premier standard. You will: + Design ... AI /LLM technologies. + Previous experience in compiler development, verification /testing, or performance analysis (ie, developing/testing C++ runtime libraries,… more