- Capgemini (Santa Clara, CA)
- …_Programmer/Analyst_ **Organization:** _ERD PPL US_ **Title:** _E/E & Semiconductor Engineer - Electrical Design Validation engineer_ **Location:** _CA-Santa ... + **MUST** have hands-on experience in board bring-up and debugging, functional verification , and manufacturing support + Highly experienced in hardware bring-up and… more
- NVIDIA (Santa Clara, CA)
- We are seeking Lead Post-Silicon Validation Engineer within the GPU Engineering Team to help drive development of future GPUs be used in 3D graphics, deep ... the GPU development cycle from concept, Plan of Record, Architecture, Micro-architecture, design, validation , physical design and tape out. What we need to see: +… more
- Qualcomm (San Diego, CA)
- …help create a smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design, implement, verify, and/or optimize the performance and power ... IP integration and system-level debugging. + System level RTL simulation & design verification . + Support chip bring up and post silicon debug. + Debug functional… more
- SpaceX (Irvine, CA)
- Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...using Python and MATLAB programs + Contribute towards pre-silicon verification , chip bring-up and post-silicon validation +… more
- Qualcomm (San Diego, CA)
- …that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip Architects to validate ... to help create a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design, optimize, verify, and test… more
- Qualcomm (San Diego, CA)
- … verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art tools, ... setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be...verify varied design IPs in addition to system-level integration validation aspects. **Key Responsibilities:** + Develop Verification … more
- Qualcomm (San Diego, CA)
- … verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art tools, ... SoC solutions which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the… more
- Abbott (Pleasanton, CA)
- …colleagues serve people in more than 160 countries. **Job Title** **Staff Systems Verification Engineer ** **Working at Abbott** At Abbott, you can do work ... female executives, and scientists. **The Opportunity** We are recruiting a **Staff Systems Verification Engineer ** to join our Abbott Heart Failure team in our… more
- Meta (Sunnyvale, CA)
- …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work with… more
- Qualcomm (San Diego, CA)
- … verification , integration into subsystem and SoC, and post-silicon validation . **Required for this Role:** + Master's/Bachelor's degree in Electrical ... Engineering, or related field and 4+ years of ASIC design, verification , validation , integration, or related work experience. OR Master's degree in Science,… more
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