- Palo Alto Networks (Santa Clara, CA)
- …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in ... debug. You will work on diverse platforms including simulation, emulation, formal verification , and silicon validation . We expect office-based employees to be… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... plans, and build test benches for block, IP, sub- system , and SoC level verification 2. Develop...with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality 5.… more
- Meta (Sunnyvale, CA)
- …transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement IP/SoC ... verification plans, build verification test benches to enable IP/sub-...with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality 6.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Verification Engineer ! As a member of our CPU Verification Team, you will be responsible for a portion of the Design ... Verification , focusing on tasks such as testbench/scoreboard/stimulus development, regression...regression debug, and coverage closure, supporting design, implementation, and system level validation /debug. This position offers you… more
- Amazon (Cupertino, CA)
- …solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards ... solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards… more
- Microsoft Corporation (Mountain View, CA)
- …of verification environments and tests at the block and sub- system level, reference modeling, emulation, and post-silicon validation . **Qualifications** ... the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities**...systems . + 2+ years of experience leading pre-silicon verification of blocks and sub systems through… more
- Amazon (Sunnyvale, CA)
- …Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, SystemC and DPI-C ... report progress to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal...systems - Familiarity with Matlab - Modem design verification experience - System C or Matlab… more
- NVIDIA (Santa Clara, CA)
- …verify the world's leading GPUs. In this role, you will be doing unit level verification of the process scheduling and system interface hardware of the GPU. This ... ensure that changes to the design are verifiable + Architect and plan the verification strategy and execution for sub- system features impacting your unit +… more
- Amazon (Cupertino, CA)
- …solutions achieve their desired functionality, developing and executing multi-faceted verification / validation plans, and measuring the teams progress towards ... will help each team member develop into a better-rounded engineer and enable them to take on more complex...or other related discipline - 3+ years of design verification experience using System Verilog and UVM… more
- Insight Global (Irvine, CA)
- …wearable insulin-delivery systems . They are looking for a hands-on Design Verification Lead to drive verification activities for their patch-pump program and ... reflect design intent. This is a highly visible, high-impact position for an engineer who thrives in regulated environments and enjoys both leading and being… more
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