• ASIC Power Management Architect

    Google (Mountain View, CA)
    ASIC Power Management Architect _corporate_fare_ Google _place_ San Diego, CA, USA; Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... equivalent practical experience. + 8 years of experience with ASIC power management architecture. + Experience with hardware or...+ Knowledge of the impact of software and architectural design decisions on power and thermal behavior of the… more
    Google (01/06/26)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …**Meet the Team** You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you will ... support. **Key Responsibilities:** + Responsible for development of the comprehensive Design -for-Test (DFT) & DFx solutions and architectures that support ATE… more
    Cisco (11/12/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on... Implementation Technical Lead with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend… more
    Cisco (11/22/25)
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  • Sr. Hardware Engineer - ML Acceleration, Annapurna…

    Amazon (Cupertino, CA)
    …as well as performance, power, area analysis and trade-offs - Experience with modern ASIC /FPGA design and verification tools - Experience with SOC bring-up and ... customers change the world. We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards… more
    Amazon (01/04/26)
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  • Senior ASIC Verification Engineer

    NVIDIA (Austin, TX)
    …and intelligence. The NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the chance to create ... on verifying and improving the related verification methodologies for the corresponding design (RTL). For this position, you should have real passion for… more
    NVIDIA (12/18/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Verification Engineer! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the world's ... performance of PCIe and CXL designs + Understand the design , define the verification scope, develop the verification infrastructure,...the verification infrastructure, and verify the correctness of the design What we need to see: + BS or… more
    NVIDIA (10/18/25)
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  • New College Grad, Senior Engineer Product…

    SanDisk (Milpitas, CA)
    …interface between various functional teams such as Test, Reliability, QA, Firmware, ASIC , NAND Design , Validation, Operations, and Manufacturing teams + ... from concept to market launch. **Essential Duties & Responsibilities:** + Research, design , develop, and test our proprietary electronic components and systems. +… more
    SanDisk (01/01/26)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …will be responsible for leading most complex and cutting edge network switching ASIC DFx ( Design for Test/debug & manufacturability) from DFT architecture, to ... + Drive the test quality of the products from Design to Production + Participate/contribute in silicon bring-up, characterization,...PDL knowledge + Strong knowledge of logic & circuit design fundamentals is needed + Working knowledge of TCL,… more
    Broadcom (11/19/25)
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  • Senior Technical Program Manager - DFX Engineering

    NVIDIA (Santa Clara, CA)
    …program management or engineering leadership. + Strong understanding of ASIC /SoC design , verification, bring-up, and productization flows (RTL-to-release). ... We seek a Senior Technical Program Manager to lead Design -for-Test (DFX) engineering programs for our next-generation chip designs. This role sits at the… more
    NVIDIA (10/17/25)
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  • ASIC DFT DV Technical Leader

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification. **Key… more
    Cisco (12/13/25)
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