• Digital Electrical Engineer, MR Wireless

    GE HealthCare (Aurora, OH)
    …of industry standard wireless protocols, digital communication standards, circuit board design process to ensure quality design output. **Job Description** ... **Job Responsibilities** Duties include (but are not limited to): + Design and implement wireless digital architectures for MRI coil systems. + Support FPGA/ ASIC… more
    GE HealthCare (01/14/26)
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  • Software Development Engineer, Leo Manufacturing…

    Amazon (Redmond, WA)
    …embedded, real-time, distributed as well as industrial automation systems. You will design and develop the manufacturing software used to drive the assembly, ... test of satellite and ground systems as well as perform high-throughput ASIC /chip level provisioning and testing. You will collaborate with teams from manufacturing… more
    Amazon (12/09/25)
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  • Senior Mechanical Engineering Technical Leader

    Cisco (San Jose, CA)
    …are the Service Provider (SP) Mechanical and Thermal team responsible for the design of Cisco's best high-performance, provider class routers, the Cisco 8000 series. ... The Cisco 8000 series utilizes Cisco's revolutionary Silicon One ASIC that delivers unmatched performance and density with feature-rich functionality. We are… more
    Cisco (11/12/25)
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  • Sr. RF/Microwave Engineer, Satellites (Starlink)

    SpaceX (Redmond, WA)
    …satellite constellation and is providing fast, reliable internet to 8M+ users worldwide. We design , build, test, and operate all parts of the system - thousands of ... systems from antenna to protocol level. You will be responsible for the design , implementation and verification of the electrical hardware for the satellites and… more
    SpaceX (01/16/26)
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  • Advanced Package Technology Engineer

    Broadcom (San Jose, CA)
    …Account, please Sign-In before you apply.** **Job Description:** As part of WW ASIC product development team, this individual will work closely with silicon & ... package design , marketing, NPI, assembly/substrate suppliers & customers and is...achieving signal integrity, thermal, structural reliability, substrate fab/package assembly design rules & project schedule requirements. *2.5D & 3D… more
    Broadcom (01/14/26)
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  • Senior Signal Integrity Engineer, Platform

    Google (Sunnyvale, CA)
    …+ Experience with the product development process for mass volume production design , with a focus on signal integrity, power integrity and lab validation. ... with PCIE, DDR, SATA, ethernet standards, PCB, connector, or cable design and assembly processes, including materials and component selection. + Experience… more
    Google (01/13/26)
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  • RF/Microwave Engineer (Silicon Engineering)

    SpaceX (Redmond, WA)
    …constellation and is providing fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the system - thousands of ... who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering). In this role, you will be… more
    SpaceX (01/03/26)
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  • Specialist, Electrical Engineering, FPGA Engineer…

    L3Harris (Cincinnati, OH)
    …As a Hardware Engineer at L3Harris you will be responsible for architecture, design and development of next generation Electronic Safe and Arm Devices utilizing the ... and versatile engineers that can create the next generation fuzing solutions. ASIC / FPGA designs will include various sensor interfaces, sequence verification, A/D… more
    L3Harris (10/23/25)
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  • Silicon Validation Engineer, Google Cloud

    Google (Sunnyvale, CA)
    …field, or equivalent practical experience. + 3 years of experience with silicon design or with semiconductors (eg, digital design , silicon validation, computer ... up, characterizing, and qualifying silicon. + Experience with high speed interfaces, ASIC interfaces, memory systems (HBM), aor power system features and high-power… more
    Google (01/15/26)
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  • Senior CPU Power Architect

    NVIDIA (Santa Clara, CA)
    …CPU Power Architect to own and optimize CPU power efficiency across the full design cycle - from early modeling to silicon validation. You will collaborate with ... architecture, RTL, physical design , and validation teams to ensure our CPUs meet...equivalent experience. + 3+ years of experience working in ASIC power measurement and optimization. + Strong understanding of… more
    NVIDIA (01/10/26)
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