- NVIDIA (Santa Clara, CA)
- …years of EDA tool development in the verification field + Hands on experience with ASIC design and verification + Good with C++ and other programming languages ... engineers on project verification support + Develop new methodologies to improve verification efficiency and capacity + Co-develop EDA tools with our vendors to best… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + Experience in low power digital ASIC design including UPF/CPF, multi-voltage domains, power gating and on chip ... or equivalent practical experience. + 5 years of experience with digital design , specializing in power implementation, and developing methodologies and flows for… more
- Micron Technology, Inc. (Boise, ID)
- …product yields and equipment efficiency to maximize ROI. + Work closely with design teams to develop design for test features to drive lower costs and ... We are seeking a passionate and innovative ATE Test Engineer to develop cutting-edge test solutions for our SSD...product test times and manufacturing cost by improving the efficiency of the testing methods. + Automate test engineering… more
- NVIDIA (Santa Clara, CA)
- …a trailblazer at the forefront of graphics and artificial intelligence performance, efficiency , and innovation. From our roots as a groundbreaking graphic company, ... multifaceted, multi-functional team at NVIDIA. We sit at the crossroads of design , architecture, marketing, and productization. Our involvement begins at the arch… more
- Google (Mountain View, CA)
- …equivalent practical experience. + 8 years of experience in DFT or physical design . + Experience with scan insertion, Automatic Test Pattern Generation (ATPG), gate ... JTAG (IJTAG) tools and flow. + Experience with DFT Electronic Design Automation (EDA) Tools like Tessent/Genus/FC/Simvision, etc. **Preferred qualifications:** +… more
- Meta (Sunnyvale, CA)
- …create as part of a world-class engineering team. **Required Skills:** Package Design Engineer Responsibilities: 1. Drive chip-package-system co- design by ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and...silicon, architecture and system teams and externally engaged partners, ASIC design partners, foundry and OSAT and… more
- Meta (Sunnyvale, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...experience 7. 6+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Google (Mountain View, CA)
- …design , implementation, verification, bring-up and post-silicon maintenance). + Experience in ASIC hardware architecture and silicon design . + Experience in ... /SoC development. + Experience across the full Application-Specific Integrated Circuit ( ASIC ) design flow, including UVM/OVM verification, synthesis, and timing… more
- Google (Mountain View, CA)
- …signal processing chains for mixed-signal sensing or actuation ASICs. + Experience with ASIC design methodologies for clock domain checks, reset checks, and low ... member of the quantum electronics team, providing technical leadership in the area of ASIC digital design as we realize sophisticated electronics for control and… more
- Google (Sunnyvale, CA)
- …of vendors, provide recommendations and employ best practices. Your work will streamline ASIC physical design workflows, make our team of physical design ... ASIC tapeouts. You will work with industry-standard physical design EDA tools and RTL To GDS CAD flows...use Google services around the world. We prioritize security, efficiency , and reliability across everything we do - from… more