- Google (Sunnyvale, CA)
- Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... an emphasis on computer architecture. + 10 years of experience in physical design flow and methodologies for high-performance ASIC /SoC projects. + Experience in… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and… more
- Arrow Electronics (Santa Clara, CA)
- **Position:** RTL Design Engineer (eInfochips) **Job Description:** **Role: RTL Design Engineer ** **Location: San Jose CA (Remote)** **Experience: 10+ ... + Lead silicon bring-up activities, troubleshoot, and debug PCIe related issues. + ASIC Design and Development: + Design , implement, and verify… more
- Amazon (Austin, TX)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in… more
- Microsoft Corporation (Santa Clara, CA)
- …Datacenters based on our highly programmable data processing chip (DPU). As a Hardware Board Design Engineer , you will be responsible for the design & ... **Overview** Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...& AI. We are looking for a **Senior Hardware Design Engineer ** to join our team! **Responsibilities**… more
- Broadcom (Fort Collins, CO)
- …area, and speed in ASIC designs. + Have an understanding of the ASIC design flow including FET design , RTL, synthesis, timing, floorplanning, power ... please Sign-In before you apply.** **Job Description:** **IP Integration Engineer ** Broadcom's ASIC Product Division (APD) is...Engineer ** will be part of a cross functional design team developing die-to-die and die-to-memory PHY IP. The… more
- Amazon (Austin, TX)
- …machine learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud ... responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design … more
- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Lead E/E & Semiconductor Engineer - SOC Design Verification Engineer_ **Location:** _WA-Seattle_… more
- Google (Sunnyvale, CA)
- Senior Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving ... + 4 years of experience working in a hardware design technical environment or 3 years of experience with...technical roadmaps. **About the job** As a Senior Hardware Engineer , you will work on ML/AI hardware systems projects… more
- Google (Sunnyvale, CA)
- Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision ... 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced...SPI, etc. **About the job** As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems… more
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