- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design ... a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that...using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration… more
- NVIDIA (Santa Clara, CA)
- …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking ... a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that...for a Senior Mask Layout Design Engineer , someone who is excited to… more
- Google (Sunnyvale, CA)
- Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision ... 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced...SPI, etc. **About the job** As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems… more
- Microsoft Corporation (Mountain View, CA)
- …engineers to help achieve that mission. We are looking for a **Senior Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... thrive at work and beyond. **Responsibilities** You will be part of the design team driving many facets of high performance, high bandwidth Compute and… more
- Meta (Austin, TX)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips...functional tests based on verification test plan 3. Drive Design Verification to closure based on defined verification metrics… more
- NVIDIA (Santa Clara, CA)
- …integrated logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic ... Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...are a team that constantly evolves by adapting to new opportunities and find creative solutions to difficult problems.… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …field teams, definers and designers . Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts for ... Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to… more
- Google (Mountain View, CA)
- RTL Design Engineer , Multimedia and Machine Learning Accelerators _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, ... or COdec) or Machine Learning IP. + Experience with ASIC design methodologies for clock domain checks...and Hardware to create radically helpful experiences. We research, design , and develop new technologies and hardware… more
- Lockheed Martin (Littleton, CO)
- …- - - **Key activities you will accomplish in this role:** * Support the primary design engineer with any power design activities that will be required for ... ** where you will be able to support lead engineer \(s\) in the potential design and development,...layout oversight * Parts selection * Flow FPGA or ASIC design requirements to ASIC /FPGA… more
- NVIDIA (Santa Clara, CA)
- …and their impacts to circuit/layout implementations and signoff flows + Expert with ASIC design semi-custom and full-custom flow + Hands-on experience running ... part of the Digital IP Team, work with other team members on the new process design challenges, have the chance to create novel low power and high performance… more