- Qualcomm (San Diego, CA)
- …performance, power and area. The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep ... Engineering Group > GPU ASICS Engineering **General Summary:** The Design Implementation Engineer will work in Qualcomm's...working with execution driven teams for tape-outs by supporting new methodologies and new flows required to… more
- Microsoft Corporation (Redmond, WA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...yourself as an integral member of a design verification team for the development of AI components… more
- NVIDIA (Santa Clara, CA)
- …integrated logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic ... Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...are a team that constantly evolves by adapting to new opportunities and find creative solutions to difficult problems.… more
- Microsoft Corporation (Redmond, WA)
- …engineers to help achieve that mission. We are looking for a **Senior** ** Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... thrive at work and beyond. **Responsibilities** + Contribute to the design of high-performance, high-bandwidth architecture for state-of-the-art AI SoCs. + Define… more
- Google (Sunnyvale, CA)
- …or equivalent practical experience. + 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced degree. + 3 years of ... experience in technical leadership. + Experience with power circuit design and signal integrity. **Preferred qualifications:** + PhD in Electrical Engineering,… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of ... a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that...using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration… more
- Broadcom (Irvine, CA)
- …guarantee production quality for "first spin" silicon, we in the CSG ASIC team combine production workload-focused test harnesses with large scale emulation ... resources to provide extensive system level ASIC test coverage prior to first silicon fab. Our...looking for a Sr. level system software / firmware engineer , with broad experience developing software and firmware for… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related experience in design and EDA (Digital Implementation/Signoff) + Understands ASIC Design implementation process and steps + Strong hands-on experience ... + Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure,… more
- Qualcomm (San Diego, CA)
- …complex algorithms and requirements Develop micro architecture and specification of the new generation design Develop RTL for the corresponding micro ... levels. **What you will be doing** : Micro-architect and design RTL for blocks and modules of Adreno GPU...DSP, Machine-Learning, cache, controller, video, display, camera blocks in ASIC is desired. + Exposure to Graphics API (OpenGL,… more
- Cisco (Milpitas, CA)
- …to be part of network switching silicon SDK domain, and contribute to the design , implementation and rollout/adoption of new on-prem and cloud managed next gen ... Senior Software Engineer - Enterprise Switching SiliconOne SDK Apply (https://jobs.cisco.com/jobs/Login?projectId=1443397)...amazing team members, and have fun applying and learning new software design and development skills in… more
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