- Ralliant (Beaverton, OR)
- …silicon characterization. + Leading a design review or mentoring a junior engineer . + Evaluating new EDA tools or semiconductor technologies for adoption. ... innovation, collaboration, and continuous improvement. + Oversee the development and maintenance of ASIC design flows to improve productivity and reduce risk. +… more
- NVIDIA (Westford, MA)
- …to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding Senior ASIC Power Integrity Engineer who is dedicated to collaborating closely ... a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only...be doing: + Ensuring robust power integrity in physical design to optimize power delivery. + Design … more
- Amazon (Austin, TX)
- Description In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we do is ... while also being deeply important to our customers. We design and build every component of our hardware and...& Career Growth Our team is dedicated to supporting new team members in an environment that celebrates knowledge… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that ... screening to sustain all these fields. This often requires new ways of thinking in order to meet ...you'll be doing: + Support the deployment of advanced Design -For-Test (DFT) and Automatic Test Pattern Generation (ATPG) solutions… more
- NVIDIA (Santa Clara, CA)
- … tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are ... Come be a part of new process technology adoption by joining NVIDIA's Advanced...or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis (STA),… more
- NVIDIA (Santa Clara, CA)
- …years of EDA tool development in the verification field + Hands on experience with ASIC design and verification + Good with C++ and other programming languages ... + Work with verification engineers on project verification support + Develop new methodologies to improve verification efficiency and capacity + Co-develop EDA tools… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + Experience in low power digital ASIC design including UPF/CPF, multi-voltage domains, power gating and on chip ... and Hardware to create radically helpful experiences. We research, design , and develop new technologies and hardware to make computing faster, seamless, and… more
- NVIDIA (Westford, MA)
- …amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon ... a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only...you will be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only...cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd:… more
- Amazon (Austin, TX)
- …Kuiper's digital design teams. This is an opportunity to define the digital design environment and deploy methodology of a new project from day one. You ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...EDA vendors and foundries to optimize the EDA flows, design collateral, and other files necessary for the … more