• Sr. Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... physical design work. Interface directly with RTL, Physical Design, Package Design, DFT teams to improve methodologies and efficiencies. Be able to independently… more
    Amazon (07/26/25)
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  • SoC Physical Design Engineer

    Meta (Sunnyvale, CA)
    …through architecture, to firmware, and algorithms.As an SoC Physical Design Engineer at Meta Reality Labs, you will perform physical design implementation ... needed for our wearable products. **Required Skills:** SoC Physical Design Engineer Responsibilities: 1. Physical design implementation from RTL to netlist for… more
    Meta (08/01/25)
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  • SOC Physical Design Engineer , Hardware…

    Amazon (Sunnyvale, CA)
    …is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part of ... hard. Have fun. Make history. As a Physical Design Engineer , you will: - Work with RTL/logic designers to...Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such… more
    Amazon (07/27/25)
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  • Sr. Circuit Design & Analysis Engineer

    Amazon (Austin, TX)
    …in datacenters all around the world. As a Circuit & Design Analysis engineer , you'll collaborate with multiple teams to drive improvements in silicon yield & ... One here at Amazon! We're searching for an experienced Circuit Design & Analysis engineer with a background in custom circuit design & analysis, system level thermal… more
    Amazon (07/26/25)
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  • Lead Product Engineer

    Cadence Design Systems, Inc. (Cary, NC)
    …an impact on the world of technology. High Speed Serdes IP Lead Product Engineer Position Description: This is a unique opportunity to join the rapidly growing team ... Design Systems. We are looking for a Lead Product Engineer who will be a key contributor to our...customers resolve IP integration issues including floorplan, functional and DFT simulations, timing closure, physical design verification, signal &… more
    Cadence Design Systems, Inc. (07/12/25)
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  • Digital Verification Engineer

    Broadcom (San Jose, CA)
    …apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you will be working on ASIC ... generating UVM RAL model + Prior experience in verification of the DFT design, architecture, and microarchitecture + Proficient with scripting languages like PERL,… more
    Broadcom (07/11/25)
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  • Sr. Silicon Validation Engineer , DVT…

    Amazon (Redmond, WA)
    …around the world. We are seeking a highly motivated and experienced Post-Silicon Verification Engineer with strong expertise in Digital ASIC and modem (PHY and ... PHY/MAC bring-up. * Exposure to firmware-hardware interaction debugging. * Knowledge of DFT /DFD, scan chain, or BIST validation. * Familiarity with signal processing… more
    Amazon (06/08/25)
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  • Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server platforms. Our ... visualizing QoR/stats - Interface directly with RTL, Physical Design, Package Design, DFT and other teams to improve methodologies and efficiencies and drive efforts… more
    Amazon (06/03/25)
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  • Principal Engineer ,Product Development…

    SanDisk (Milpitas, CA)
    …critical interface between various cross-functional teams, including Test, Reliability, Firmware, ASIC , NAND Design, Operations + Identify and mitigate risks during ... Python scripting for test automation and data analysis + Experience working on DFT and test automation + Hands-on experience with lab equipment (oscilloscopes, logic… more
    SanDisk (07/08/25)
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  • Static Timing Engineer , Cloud

    Google (Sunnyvale, CA)
    …Additionally, you will work with architecture, logic design, and Design for testing ( DFT ) teams to understand and implement the requirements. The ML, Systems, & ... timing analysis, timing ECO creation for timing convergence, and final timing sign-off for ASIC tape outs. + Utilize Perl, Python, Tcl, or Bash to create static… more
    Google (07/02/25)
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